11 #include "clk-phase.h"
40 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);  in meson_clk_phase_get_phase()  local
43 	val = meson_parm_read(clk->map, &phase->ph);  in meson_clk_phase_get_phase()
45 	return meson_clk_degrees_from_val(val, phase->ph.width);  in meson_clk_phase_get_phase()
51 	struct meson_clk_phase_data *phase = meson_clk_phase_data(clk);  in meson_clk_phase_set_phase()  local
54 	val = meson_clk_degrees_to_val(degrees, phase->ph.width);  in meson_clk_phase_set_phase()
55 	meson_parm_write(clk->map, &phase->ph, val);  in meson_clk_phase_set_phase()
68  * The phase of mst_sclk clock output can be controlled independently
72  * If necessary, we can still control the phase in the tdm block
87 	/* Get phase 0 and sync it to phase 1 and 2 */  in meson_clk_triphase_sync()
101 	/* Phase are in sync, reading phase 0 is enough */  in meson_clk_triphase_get_phase()
146 	/* Get phase and sync the inverted value to ws */  in meson_sclk_ws_inv_sync()
183 MODULE_DESCRIPTION("Amlogic phase driver");