clk/meson/c3-pll.c

1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/clk-provider.h>
11 #include "clk-regmap.h"
12 #include "clk-pll.h"
13 #include "meson-clkc-utils.h"
14 #include <dt-bindings/clock/amlogic,c3-pll-clkc.h>
38 	.data = &(struct clk_regmap_gate_data) {
79 	.data = &(struct clk_regmap_gate_data) {
107 	.data = &(struct clk_regmap_gate_data) {
135 	.data = &(struct clk_regmap_gate_data) {
163 	.data = &(struct clk_regmap_gate_data) {
191 	.data = &(struct clk_regmap_gate_data) {
219 	.data = &(struct clk_regmap_gate_data) {
247 	.data = &(struct meson_clk_pll_data) {
251 			.width   = 1,
256 			.width   = 9,
261 			.width   = 19,
266 			.width   = 5,
271 			.width   = 1,
276 			.width   = 1,
304 	.data = &(struct clk_regmap_div_data) {
307 		.width = 3,
330 	.data = &(struct meson_clk_pll_data) {
334 			.width   = 1,
339 			.width   = 8,
344 			.width   = 19,
349 			.width   = 5,
354 			.width   = 1,
359 			.width   = 1,
376 	.data = &(struct clk_regmap_div_data) {
379 		.width = 2,
406 	.data = &(struct meson_clk_pll_data) {
410 			.width   = 1,
415 			.width   = 8,
420 			.width   = 5,
425 			.width   = 1,
430 			.width   = 1,
456 	.data = &(struct clk_regmap_div_data) {
459 		.width = 3,
474 	.data = &(struct clk_regmap_div_data) {
477 		.width = 5,
498 	.data = &(struct clk_regmap_mux_data) {
512 	.data = &(struct clk_regmap_gate_data) {
528 	.data = &(struct clk_regmap_div_data) {
531 		.width = 1,
545 	.data = &(struct clk_regmap_gate_data) {
561 	.data = &(struct clk_regmap_mux_data) {
575 	.data = &(struct clk_regmap_gate_data) {
591 	.data = &(struct clk_regmap_div_data) {
594 		.width = 1,
608 	.data = &(struct clk_regmap_gate_data) {
695 	struct device *dev = &pdev->dev;  in c3_pll_probe()
710 		c3_pll_clk_regmaps[i]->map = regmap;  in c3_pll_probe()
730 		.compatible = "amlogic,c3-pll-clkc",
739 		.name	= "c3-pll-clkc",