Lines Matching refs:AML_PWM_CLK_GATE

561 #define AML_PWM_CLK_GATE(_name, _reg, _bit) {			\  macro
580 	AML_PWM_CLK_GATE(pwm_a, PWM_CLK_AB_CTRL, 8);
587 	AML_PWM_CLK_GATE(pwm_b, PWM_CLK_AB_CTRL, 24);
594 	AML_PWM_CLK_GATE(pwm_c, PWM_CLK_CD_CTRL, 8);
601 	AML_PWM_CLK_GATE(pwm_d, PWM_CLK_CD_CTRL, 24);
608 	AML_PWM_CLK_GATE(pwm_e, PWM_CLK_EF_CTRL, 8);
615 	AML_PWM_CLK_GATE(pwm_f, PWM_CLK_EF_CTRL, 24);
622 	AML_PWM_CLK_GATE(pwm_g, PWM_CLK_GH_CTRL, 8);
629 	AML_PWM_CLK_GATE(pwm_h, PWM_CLK_GH_CTRL, 24);
636 	AML_PWM_CLK_GATE(pwm_i, PWM_CLK_IJ_CTRL, 8);
643 	AML_PWM_CLK_GATE(pwm_j, PWM_CLK_IJ_CTRL, 24);
650 	AML_PWM_CLK_GATE(pwm_k, PWM_CLK_KL_CTRL, 8);
657 	AML_PWM_CLK_GATE(pwm_l, PWM_CLK_KL_CTRL, 24);
664 	AML_PWM_CLK_GATE(pwm_m, PWM_CLK_MN_CTRL, 8);
671 	AML_PWM_CLK_GATE(pwm_n, PWM_CLK_MN_CTRL, 24);