Lines Matching refs:mst_d_mclk

576 	AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_MCLK_D_CTRL);
589 	AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_MCLK_D_CTRL);
601 static struct clk_regmap mst_d_mclk =  variable
602 	AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_MCLK_D_CTRL);
767 	AUD_MST_MCLK_MUX(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
784 	AUD_MST_MCLK_DIV(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
802 	AUD_MST_MCLK_GATE(mst_d_mclk, AUDIO_SM1_MCLK_D_CTRL);
869 	[AUD_CLKID_MST_D_MCLK]		= &mst_d_mclk.hw,
999 	[AUD_CLKID_MST_D_MCLK]		= &mst_d_mclk.hw,
1298 	&mst_d_mclk,
1423 	&mst_d_mclk,