clk/mediatek/clk-mt8365-apmixedsys.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2022 MediaTek Inc.
4  * Copyright (c) 2023 Collabora Ltd.
7 #include <dt-bindings/clock/mediatek,mt8365-clk.h>
12 #include "clk-pll.h"
13 #include "clk-mtk.h"
84 	      22, 0x0310, 24, 0, 0, 0, 0x0310, 0, armpll_div_table, 0, 0),
86 	    HAVE_RST_BAR, 22, 0x022C, 24, 0, 0, 0, 0x022C, 0, CON0_MT8365_RST_BAR, 0),
88 	    HAVE_RST_BAR, 22, 0x020C, 24, 0, 0, 0, 0x020C, 0, CON0_MT8365_RST_BAR, 0),
89 	PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0218, 0x0224, 0x00000001, 0, 22,
91 	PLL(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035C, 0x00000001, 0, 22,
93 	PLL(CLK_APMIXED_MMPLL, "mmpll", 0x0330, 0x033C, 0x00000001, 0, 22,
99 	PLL(CLK_APMIXED_LVDSPLL, "lvdspll", 0x0374, 0x0380, 0x00000001, 0, 22,
101 	PLL_B(CLK_APMIXED_DSPPLL, "dsppll", 0x0390, 0x039C, 0x00000001, 0, 22,
103 	PLL(CLK_APMIXED_APUPLL, "apupll", 0x03A0, 0x03AC, 0x00000001, 0, 22,
111 	struct device_node *node = pdev->dev.of_node;  in clk_mt8365_apmixed_probe()
112 	struct device *dev = &pdev->dev;  in clk_mt8365_apmixed_probe()
122 		return -ENOMEM;  in clk_mt8365_apmixed_probe()
128 	clk_data->hws[CLK_APMIXED_UNIV_EN] = hw;  in clk_mt8365_apmixed_probe()
134 	clk_data->hws[CLK_APMIXED_USB20_EN] = hw;  in clk_mt8365_apmixed_probe()
153 	{ .compatible = "mediatek,mt8365-apmixedsys" },
161 		.name = "clk-mt8365-apmixed",