clk/mediatek/clk-mt8188-topckgen.c

1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/mediatek,mt8188-clk.h>
11 #include "clk-gate.h"
12 #include "clk-mtk.h"
13 #include "clk-mux.h"
953 	 * spm_sel and scp_sel are main clocks in always-on co-processor.
1079 	 * top_mcupm is main clock in co-processor, should not be handled by Linux.
1168 	 * top_ulposc/top_srck are clock source of always on co-processor,
1233 	{ .compatible = "mediatek,mt8188-topckgen" },
1245 		return -ENOMEM;  in clk_mt8188_reg_mfg_mux_notifier()
1247 	mfg_mux_nb->ops = &clk_mux_ops;  in clk_mt8188_reg_mfg_mux_notifier()
1248 	mfg_mux_nb->bypass_index = 0; /* Bypass to TOP_MFG_CORE_TMP */  in clk_mt8188_reg_mfg_mux_notifier()
1256 	struct device_node *node = pdev->dev.of_node;  in clk_mt8188_topck_probe()
1263 		return -ENOMEM;  in clk_mt8188_topck_probe()
1280 	r = mtk_clk_register_muxes(&pdev->dev, top_mtk_muxes,  in clk_mt8188_topck_probe()
1286 	hw = devm_clk_hw_register_mux(&pdev->dev, "mfg_ck_fast_ref", mfg_fast_ref_parents,  in clk_mt8188_topck_probe()
1293 	top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF] = hw;  in clk_mt8188_topck_probe()
1295 	r = clk_mt8188_reg_mfg_mux_notifier(&pdev->dev,  in clk_mt8188_topck_probe()
1296 					    top_clk_data->hws[CLK_TOP_MFG_CK_FAST_REF]->clk);  in clk_mt8188_topck_probe()
1300 	r = mtk_clk_register_composites(&pdev->dev, top_adj_divs,  in clk_mt8188_topck_probe()
1306 	r = mtk_clk_register_gates(&pdev->dev, node, top_clks,  in clk_mt8188_topck_probe()
1337 	struct device_node *node = pdev->dev.of_node;  in clk_mt8188_topck_remove()
1352 		.name = "clk-mt8188-topck",
1358 MODULE_DESCRIPTION("MediaTek MT8188 top clock generators driver");