clk/mediatek/clk-mt8183.c

1 // SPDX-License-Identifier: GPL-2.0
12 #include "clk-gate.h"
13 #include "clk-mtk.h"
14 #include "clk-mux.h"
16 #include <dt-bindings/clock/mt8183-clk.h>
22 	FIXED_CLK(CLK_TOP_ULPOSC, "osc", NULL, 250000),
99 	FACTOR(CLK_TOP_AD_OSC_CK, "ad_osc_ck", "osc", 1, 1),
100 	FACTOR(CLK_TOP_OSC_D2, "osc_d2", "osc", 1, 2),
101 	FACTOR(CLK_TOP_OSC_D4, "osc_d4", "osc", 1, 4),
102 	FACTOR(CLK_TOP_OSC_D8, "osc_d8", "osc", 1, 8),
103 	FACTOR(CLK_TOP_OSC_D16, "osc_d16", "osc", 1, 16),
455  * spm_sel is the clock of the always-on co-processor.
768 	/* infra_sspm is main clock in co-processor, should not be closed in Linux. */
771 	/* infra_sspm_bus_hclk is main clock in co-processor, should not be closed in Linux. */
790 	/* infra_sspm_26m_self is main clock in co-processor, should not be closed in Linux. */
792 	/* infra_sspm_32k_self is main clock in co-processor, should not be closed in Linux. */
844 		return -ENOMEM;  in clk_mt8183_reg_mfg_mux_notifier()
850 		return -EINVAL;  in clk_mt8183_reg_mfg_mux_notifier()
852 	mfg_mux_nb->ops = top_muxes[i].ops;  in clk_mt8183_reg_mfg_mux_notifier()
853 	mfg_mux_nb->bypass_index = 0; /* Bypass to 26M crystal */  in clk_mt8183_reg_mfg_mux_notifier()
892 	{ .compatible = "mediatek,mt8183-infracfg", .data = &infra_desc },
893 	{ .compatible = "mediatek,mt8183-mcucfg", .data = &mcu_desc },
894 	{ .compatible = "mediatek,mt8183-pericfg", .data = &peri_desc, },
895 	{ .compatible = "mediatek,mt8183-topckgen", .data = &topck_desc },
904 		.name = "clk-mt8183",