Lines Matching full:top_xtal

21 	FIXED_CLK(CLK_TOP_XTAL, "top_xtal", "clkxtal", 40000000),
25 	FACTOR(CLK_TOP_XTAL_D2, "top_xtal_d2", "top_xtal", 1, 2),
26 	FACTOR(CLK_TOP_RTC_32K, "top_rtc_32k", "top_xtal", 1, 1250),
27 	FACTOR(CLK_TOP_RTC_32P7K, "top_rtc_32p7k", "top_xtal", 1, 1220),
56 static const char *const netsys_parents[] = { "top_xtal", "net2pll_d2", "mmpll_d2" };
57 static const char *const netsys_500m_parents[] = { "top_xtal", "net1pll_d5", "net1pll_d5_d2" };
58 static const char *const netsys_2x_parents[] = { "top_xtal", "net2pll", "mmpll" };
59 static const char *const netsys_gsw_parents[] = { "top_xtal", "net1pll_d4", "net1pll_d5" };
60 static const char *const eth_gmii_parents[] = { "top_xtal", "net1pll_d5_d4" };
61 static const char *const netsys_mcu_parents[] = { "top_xtal",	"net2pll",    "mmpll",
63 static const char *const eip197_parents[] = { "top_xtal", "netsyspll",	"net2pll",
65 static const char *const axi_infra_parents[] = { "top_xtal", "net1pll_d8_d2" };
66 static const char *const uart_parents[] = { "top_xtal", "mpll_d8", "mpll_d8_d2" };
67 static const char *const emmc_250m_parents[] = { "top_xtal", "net1pll_d5_d2", "mmpll_d4" };
68 static const char *const emmc_400m_parents[] = { "top_xtal", "msdcpll",	 "mmpll_d2",
70 static const char *const spi_parents[] = { "top_xtal",	    "mpll_d2",	    "mmpll_d4",
73 static const char *const nfi1x_parents[] = { "top_xtal", "mmpll_d4", "net1pll_d8_d2", "net2pll_d6",
75 static const char *const spinfi_parents[] = { "top_xtal_d2", "top_xtal", "net1pll_d5_d4",
78 static const char *const pwm_parents[] = { "top_xtal", "net1pll_d8_d2", "net1pll_d5_d4",
80 static const char *const i2c_parents[] = { "top_xtal", "net1pll_d5_d4", "mpll_d4",
82 static const char *const pcie_mbist_250m_parents[] = { "top_xtal", "net1pll_d5_d2" };
83 static const char *const pextp_tl_ck_parents[] = { "top_xtal", "net2pll_d6", "mmpll_d8",
85 static const char *const usb_frmcnt_parents[] = { "top_xtal", "mmpll_d3_d5" };
86 static const char *const aud_parents[] = { "top_xtal", "apll2" };
87 static const char *const a1sys_parents[] = { "top_xtal", "apll2_d4" };
88 static const char *const aud_l_parents[] = { "top_xtal", "apll2", "mpll_d8_d2" };
90 static const char *const usxgmii_sbus_0_parents[] = { "top_xtal", "net1pll_d8_d4" };
91 static const char *const sgm_0_parents[] = { "top_xtal", "sgmpll" };
92 static const char *const sysapb_parents[] = { "top_xtal", "mpll_d3_d2" };
93 static const char *const eth_refck_50m_parents[] = { "top_xtal", "net2pll_d4_d4" };
94 static const char *const eth_sys_200m_parents[] = { "top_xtal", "net2pll_d4" };
96 static const char *const bus_tops_parents[] = { "top_xtal", "net1pll_d5", "net2pll_d2" };
97 static const char *const npu_tops_parents[] = { "top_xtal", "net2pll" };
98 static const char *const dramc_md32_parents[] = { "top_xtal", "mpll_d2", "wedmcupll" };
99 static const char *const da_xtp_glb_p0_parents[] = { "top_xtal", "net2pll_d8" };
100 static const char *const mcusys_backup_625m_parents[] = { "top_xtal", "net1pll_d4" };
101 static const char *const macsec_parents[] = { "top_xtal", "sgmpll", "net1pll_d8" };
102 static const char *const netsys_tops_400m_parents[] = { "top_xtal", "net2pll_d2" };
291 static const char *const mcu_bus_div_parents[] = { "top_xtal", "ccipll2_b", "net1pll_d4" };
293 static const char *const mcu_arm_div_parents[] = { "top_xtal", "arm_b", "net1pll_d4" };