clk/ingenic/cgu.h

3  * Ingenic SoC CGU driver
19  * @reg: the offset of the PLL's control register within the CGU
42  * @bypass_reg: the offset of the bypass control register within the CGU
49  * @set_rate_hook: hook called immediately after updating the CGU register,
72  * @reg: offset of the mux control register within the CGU
85  * @reg: offset of the divider control register within the CGU
122  * @reg: offset of the gate control register within the CGU
148  *           within the clock_info array of the CGU, or -1 in entries
191  * struct ingenic_cgu - data about the CGU
192  * @np: the device tree node that caused the CGU to be probed
193  * @base: the ioremap'ed base address of the CGU registers
196  * @lock: lock to be held whilst manipulating CGU registers
211  * @cgu: a pointer to the CGU data
212  * @idx: the index of this clock in cgu->clock_info
216 	struct ingenic_cgu *cgu;  member
223  * ingenic_cgu_new() - create a new CGU instance
225  *              which are implemented by the CGU
227  * @np: the device tree node which causes this CGU to be probed
229  * Return: a pointer to the CGU instance if initialisation is successful,
238  * @cgu: pointer to cgu data
240  * Register the clocks described by the CGU with the common clock framework.
244 int ingenic_cgu_register_clocks(struct ingenic_cgu *cgu);