19 /* PLL Control Status Register (xPLLCSR) */
24 /* PLL Configuration Register (xPLLCFG) */
30 /* PLL Numerator Register (xPLLNUM) */
34 /* PLL Denominator Register (xPLLDENOM) */
50 /* Valid PLL MULT Table */
53 /* Valid PLL MULT range, (max, min) */
60 static inline int clk_pllv4_wait_lock(struct clk_pllv4 *pll)  in clk_pllv4_wait_lock()  argument
64 	return readl_poll_timeout(pll->base  + PLL_CSR_OFFSET,  in clk_pllv4_wait_lock()
70 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_is_prepared()  local
72 	if (readl_relaxed(pll->base) & PLL_EN)  in clk_pllv4_is_prepared()
81 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_recalc_rate()  local
85 	mult = readl_relaxed(pll->base + pll->cfg_offset);  in clk_pllv4_recalc_rate()
89 	mfn = readl_relaxed(pll->base + pll->num_offset);  in clk_pllv4_recalc_rate()
90 	mfd = readl_relaxed(pll->base + pll->denom_offset);  in clk_pllv4_recalc_rate()
101 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_round_rate()  local
109 	if (pll->use_mult_range) {  in clk_pllv4_round_rate()
158 static bool clk_pllv4_is_valid_mult(struct clk_pllv4 *pll, unsigned int mult)  in clk_pllv4_is_valid_mult()  argument
163 	if (pll->use_mult_range) {  in clk_pllv4_is_valid_mult()
180 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_set_rate()  local
186 	if (!clk_pllv4_is_valid_mult(pll, mult))  in clk_pllv4_set_rate()
197 	val = readl_relaxed(pll->base + pll->cfg_offset);  in clk_pllv4_set_rate()
200 	writel_relaxed(val, pll->base + pll->cfg_offset);  in clk_pllv4_set_rate()
202 	writel_relaxed(mfn, pll->base + pll->num_offset);  in clk_pllv4_set_rate()
203 	writel_relaxed(mfd, pll->base + pll->denom_offset);  in clk_pllv4_set_rate()
211 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_prepare()  local
213 	val = readl_relaxed(pll->base);  in clk_pllv4_prepare()
215 	writel_relaxed(val, pll->base);  in clk_pllv4_prepare()
217 	return clk_pllv4_wait_lock(pll);  in clk_pllv4_prepare()
223 	struct clk_pllv4 *pll = to_clk_pllv4(hw);  in clk_pllv4_unprepare()  local
225 	val = readl_relaxed(pll->base);  in clk_pllv4_unprepare()
227 	writel_relaxed(val, pll->base);  in clk_pllv4_unprepare()
242 	struct clk_pllv4 *pll;  in imx_clk_hw_pllv4()  local
247 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in imx_clk_hw_pllv4()
248 	if (!pll)  in imx_clk_hw_pllv4()
251 	pll->base = base;  in imx_clk_hw_pllv4()
255 		pll->cfg_offset = IMX8ULP_PLL_CFG_OFFSET;  in imx_clk_hw_pllv4()
256 		pll->num_offset = IMX8ULP_PLL_NUM_OFFSET;  in imx_clk_hw_pllv4()
257 		pll->denom_offset = IMX8ULP_PLL_DENOM_OFFSET;  in imx_clk_hw_pllv4()
259 			pll->use_mult_range = true;  in imx_clk_hw_pllv4()
261 		pll->cfg_offset = PLL_CFG_OFFSET;  in imx_clk_hw_pllv4()
262 		pll->num_offset = PLL_NUM_OFFSET;  in imx_clk_hw_pllv4()
263 		pll->denom_offset = PLL_DENOM_OFFSET;  in imx_clk_hw_pllv4()
272 	pll->hw.init = &init;  in imx_clk_hw_pllv4()
274 	hw = &pll->hw;  in imx_clk_hw_pllv4()
277 		kfree(pll);  in imx_clk_hw_pllv4()