clk/imx/clk-imx6sl.c

34 static const char *step_sels[]		= { "osc", "pll2_pfd2", };
39 static const char *periph_clk2_sels[]	= { "pll3_usb_otg", "osc", "osc", "dummy", };
43 static const char *csi_sels[]		= { "osc", "pll2_pfd2", "pll3_120m", "pll3_pfd1", };
47 static const char *perclk_sels[]	= { "ipg", "osc", };
55 static const char *ecspi_sels[]		= { "pll3_60m", "osc", };
56 static const char *uart_sels[]		= { "pll3_80m", "osc", };
60 	"pll3_pfd2", "pll3_pfd3", "osc", "dummy", "dummy", "dummy", "dummy", "dummy",
63 static const char *pll_bypass_src_sels[] = { "osc", "lvds1_in", };
198 	hws[IMX6SL_CLK_OSC] = imx_obtain_fixed_clock_hw("osc", 0);  in imx6sl_clocks_init()
217 	hws[IMX6SL_CLK_PLL1] = imx_clk_hw_pllv3(IMX_PLLV3_SYS,     "pll1", "osc", base + 0x00, 0x7f);  in imx6sl_clocks_init()
218 	hws[IMX6SL_CLK_PLL2] = imx_clk_hw_pllv3(IMX_PLLV3_GENERIC, "pll2", "osc", base + 0x30, 0x1);  in imx6sl_clocks_init()
219 	hws[IMX6SL_CLK_PLL3] = imx_clk_hw_pllv3(IMX_PLLV3_USB,     "pll3", "osc", base + 0x10, 0x3);  in imx6sl_clocks_init()
220 	hws[IMX6SL_CLK_PLL4] = imx_clk_hw_pllv3(IMX_PLLV3_AV,      "pll4", "osc", base + 0x70, 0x7f);  in imx6sl_clocks_init()
221 	hws[IMX6SL_CLK_PLL5] = imx_clk_hw_pllv3(IMX_PLLV3_AV,      "pll5", "osc", base + 0xa0, 0x7f);  in imx6sl_clocks_init()
222 	hws[IMX6SL_CLK_PLL6] = imx_clk_hw_pllv3(IMX_PLLV3_ENET,    "pll6", "osc", base + 0xe0, 0x3);  in imx6sl_clocks_init()
223 	hws[IMX6SL_CLK_PLL7] = imx_clk_hw_pllv3(IMX_PLLV3_USB,     "pll7", "osc", base + 0x20, 0x3);  in imx6sl_clocks_init()