Lines Matching +full:0 +full:xc4
40 { HI3516CV300_FIXED_3M, "3m", NULL, 0, 3000000, },
41 { HI3516CV300_FIXED_6M, "6m", NULL, 0, 6000000, },
42 { HI3516CV300_FIXED_24M, "24m", NULL, 0, 24000000, },
43 { HI3516CV300_FIXED_49P5, "49.5m", NULL, 0, 49500000, },
44 { HI3516CV300_FIXED_50M, "50m", NULL, 0, 50000000, },
45 { HI3516CV300_FIXED_83P3M, "83.3m", NULL, 0, 83300000, },
46 { HI3516CV300_FIXED_99M, "99m", NULL, 0, 99000000, },
47 { HI3516CV300_FIXED_100M, "100m", NULL, 0, 100000000, },
48 { HI3516CV300_FIXED_148P5M, "148.5m", NULL, 0, 148500000, },
49 { HI3516CV300_FIXED_198M, "198m", NULL, 0, 198000000, },
50 { HI3516CV300_FIXED_297M, "297m", NULL, 0, 297000000, },
51 { HI3516CV300_APB_CLK, "apb", NULL, 0, 50000000, },
62 static u32 uart_mux_table[] = {0, 1};
63 static u32 fmc_mux_table[] = {0, 1, 2, 3, 4};
64 static u32 mmc_mux_table[] = {0};
65 static u32 mmc2_mux_table[] = {0, 2};
66 static u32 pwm_mux_table[] = {0, 1, 2, 3};
70 CLK_SET_RATE_PARENT, 0xe4, 19, 1, 0, uart_mux_table, },
72 CLK_SET_RATE_PARENT, 0xc0, 2, 3, 0, fmc_mux_table, },
74 CLK_SET_RATE_PARENT, 0xc4, 4, 2, 0, mmc_mux_table, },
76 CLK_SET_RATE_PARENT, 0xc4, 12, 2, 0, mmc_mux_table, },
78 CLK_SET_RATE_PARENT, 0xc4, 20, 2, 0, mmc2_mux_table, },
80 CLK_SET_RATE_PARENT, 0xc8, 4, 2, 0, mmc_mux_table, },
82 CLK_SET_RATE_PARENT, 0x38, 2, 2, 0, pwm_mux_table, },
88 0xe4, 15, 0, },
90 0xe4, 16, 0, },
92 0xe4, 17, 0, },
95 0xe4, 13, 0, },
97 0xe4, 14, 0, },
100 0xc0, 1, 0, },
102 0xc4, 1, 0, },
104 0xc4, 9, 0, },
106 0xc4, 17, 0, },
108 0xc8, 1, 0, },
110 { HI3516CV300_ETH_CLK, "clk_eth", NULL, 0, 0xec, 1, 0, },
112 { HI3516CV300_DMAC_CLK, "clk_dmac", NULL, 0, 0xd8, 5, 0, },
114 0x38, 1, 0, },
116 { HI3516CV300_USB2_BUS_CLK, "clk_usb2_bus", NULL, 0, 0xb8, 0, 0, },
117 { HI3516CV300_USB2_OHCI48M_CLK, "clk_usb2_ohci48m", NULL, 0,
118 0xb8, 1, 0, },
119 { HI3516CV300_USB2_OHCI12M_CLK, "clk_usb2_ohci12m", NULL, 0,
120 0xb8, 2, 0, },
121 { HI3516CV300_USB2_OTG_UTMI_CLK, "clk_usb2_otg_utmi", NULL, 0,
122 0xb8, 3, 0, },
123 { HI3516CV300_USB2_HST_PHY_CLK, "clk_usb2_hst_phy", NULL, 0,
124 0xb8, 4, 0, },
125 { HI3516CV300_USB2_UTMI0_CLK, "clk_usb2_utmi0", NULL, 0, 0xb8, 5, 0, },
126 { HI3516CV300_USB2_PHY_CLK, "clk_usb2_phy", NULL, 0, 0xb8, 7, 0, },
196 static u32 wdt_mux_table[] = {0, 1};
200 CLK_SET_RATE_PARENT, 0x0, 23, 1, 0, wdt_mux_table, },
284 return 0; in hi3516cv300_crg_probe()