Lines Matching +full:protected +full:- +full:clocks
1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2010-2011 Canonical Ltd <jeremy.kerr@canonical.com>
4 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 * Standard functionality for the common clock API. See Documentation/driver-api/clk.rst
10 #include <linux/clk-provider.h>
11 #include <linux/clk/clk-conf.h>
116 if (!core->rpm_enabled)
119 return pm_runtime_resume_and_get(core->dev);
124 if (!core->rpm_enabled)
127 pm_runtime_put_sync(core->dev);
131 * clk_pm_runtime_get_all() - Runtime "get" all clk provider devices
166 dev_name(failed->dev), failed->name);
186 * clk_pm_runtime_put_all() - Runtime "put" all clk provider devices
202 struct device *dev = core->dev;
205 core->rpm_enabled = true;
208 hlist_add_head(&core->rpm_node, &clk_rpm_list);
234 if (--prepare_refcnt)
274 if (--enable_refcnt) {
284 return core->protect_count;
292 * .is_prepared is optional for clocks that can prepare
295 if (!core->ops->is_prepared)
296 return core->prepare_count;
299 ret = core->ops->is_prepared(core->hw);
311 * .is_enabled is only mandatory for clocks that gate
314 if (!core->ops->is_enabled)
315 return core->enable_count;
327 if (core->rpm_enabled) {
328 pm_runtime_get_noresume(core->dev);
329 if (!pm_runtime_active(core->dev)) {
340 if ((core->flags & CLK_OPS_PARENT_ENABLE) && core->parent)
341 if (!clk_core_is_enabled(core->parent)) {
346 ret = core->ops->is_enabled(core->hw);
348 if (core->rpm_enabled)
349 pm_runtime_put(core->dev);
358 return !clk ? NULL : clk->core->name;
364 return hw->core->name;
370 return !clk ? NULL : clk->core->hw;
376 return hw->core->num_parents;
382 return hw->core->parent ? hw->core->parent->hw : NULL;
392 if (!strcmp(core->name, name))
395 hlist_for_each_entry(child, &core->children, child_node) {
439 return -ENOENT;
444 return ERR_PTR(-ENOENT);
449 * clk_core_get - Find the clk_core parent of a clk
456 * node's 'clock-names' property or as the 'con_id' matching the device's
461 * clock-controller@c001 that has a clk_init_data::parent_data array
463 * clock-controller@f00abcd without needing to get the globally unique name of
466 * parent: clock-controller@f00abcd {
468 * #clock-cells = <0>;
471 * clock-controller@c001 {
473 * clocks = <&parent>;
474 * clock-names = "xtal";
475 * #clock-cells = <1>;
478 * Returns: -ENOENT when the provider can't be found or the clk doesn't
486 const char *name = core->parents[p_index].fw_name;
487 int index = core->parents[p_index].index;
488 struct clk_hw *hw = ERR_PTR(-ENOENT);
489 struct device *dev = core->dev;
491 struct device_node *np = core->of_node;
512 return hw->core;
517 struct clk_parent_map *entry = &core->parents[index];
520 if (entry->hw) {
521 parent = entry->hw->core;
524 if (PTR_ERR(parent) == -ENOENT && entry->name)
525 parent = clk_core_lookup(entry->name);
534 parent = ERR_PTR(-EPROBE_DEFER);
538 entry->core = parent;
544 if (!core || index >= core->num_parents || !core->parents)
547 if (!core->parents[index].core)
550 return core->parents[index].core;
558 parent = clk_core_get_parent_by_index(hw->core, index);
560 return !parent ? NULL : parent->hw;
566 return !clk ? 0 : clk->core->enable_count;
574 if (!core->num_parents || core->parent)
575 return core->rate;
587 return clk_core_get_rate_nolock(hw->core);
596 return core->accuracy;
601 return hw->core->flags;
607 return clk_core_is_prepared(hw->core);
613 return clk_core_rate_is_protected(hw->core);
619 return clk_core_is_enabled(hw->core);
628 return clk_core_is_enabled(clk->core);
636 return abs(now - rate) < abs(best - rate);
654 if (core->parent == parent)
657 for (i = 0; i < core->num_parents; i++) {
681 if (req->min_rate < old_req->min_rate)
682 req->min_rate = old_req->min_rate;
684 if (req->max_rate > old_req->max_rate)
685 req->max_rate = old_req->max_rate;
692 struct clk_core *core = hw->core;
693 struct clk_core *parent = core->parent;
697 if (core->flags & CLK_SET_RATE_PARENT) {
701 req->rate = 0;
706 req->rate);
723 req->best_parent_rate = best;
724 req->rate = best;
733 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
738 if (core->flags & CLK_SET_RATE_NO_REPARENT)
742 num_parents = core->num_parents;
750 if (core->flags & CLK_SET_RATE_PARENT) {
753 clk_core_forward_rate_req(core, req, parent, &parent_req, req->rate);
768 if (mux_is_better_rate(req->rate, parent_rate,
776 return -EINVAL;
778 req->best_parent_hw = best_parent->hw;
779 req->best_parent_rate = best;
780 req->rate = best;
790 return !core ? NULL : core->hw->clk;
801 *min_rate = core->min_rate;
802 *max_rate = core->max_rate;
804 hlist_for_each_entry(clk_user, &core->clks, clks_node)
805 *min_rate = max(*min_rate, clk_user->min_rate);
807 hlist_for_each_entry(clk_user, &core->clks, clks_node)
808 *max_rate = min(*max_rate, clk_user->max_rate);
812 * clk_hw_get_rate_range() - returns the clock rate range for a hw clk
823 clk_core_get_boundaries(hw->core, min_rate, max_rate);
835 if (min_rate > core->max_rate || max_rate < core->min_rate)
838 hlist_for_each_entry(user, &core->clks, clks_node)
839 if (min_rate > user->max_rate || max_rate < user->min_rate)
848 hw->core->min_rate = min_rate;
849 hw->core->max_rate = max_rate;
854 * __clk_mux_determine_rate - clk_ops::determine_rate implementation for a mux type clk
862 * Returns: 0 on success, -EERROR value on error
879 * clk_hw_determine_rate_no_reparent - clk_ops::determine_rate implementation for a clk that doesn't reparent
888 * Returns: 0 on success, -EERROR value on error
906 if (WARN(core->protect_count == 0,
907 "%s already unprotected\n", core->name))
910 if (--core->protect_count > 0)
913 clk_core_rate_unprotect(core->parent);
923 return -EINVAL;
925 if (core->protect_count == 0)
928 ret = core->protect_count;
929 core->protect_count = 1;
936 * clk_rate_exclusive_put - release exclusivity over clock rate control
941 * clock which could result in a rate change or rate glitch. Exclusive clocks
943 * further up the parent chain of clocks. As a result, clocks up parent chain
964 if (WARN_ON(clk->exclusive_count <= 0))
967 clk_core_rate_unprotect(clk->core);
968 clk->exclusive_count--;
981 if (core->protect_count == 0)
982 clk_core_rate_protect(core->parent);
984 core->protect_count++;
998 core->protect_count = count;
1002 * clk_rate_exclusive_get - get exclusivity over the clk rate control
1007 * clock which could result in a rate change or rate glitch. Exclusive clocks
1009 * further up the parent chain of clocks. As a result, clocks up parent chain
1017 * Returns 0 on success, -EERROR otherwise
1025 clk_core_rate_protect(clk->core);
1026 clk->exclusive_count++;
1059 if (WARN(core->prepare_count == 0,
1060 "%s already unprepared\n", core->name))
1063 if (WARN(core->prepare_count == 1 && core->flags & CLK_IS_CRITICAL,
1064 "Unpreparing critical %s\n", core->name))
1067 if (core->flags & CLK_SET_RATE_GATE)
1070 if (--core->prepare_count > 0)
1073 WARN(core->enable_count > 0, "Unpreparing enabled %s\n", core->name);
1077 if (core->ops->unprepare)
1078 core->ops->unprepare(core->hw);
1081 clk_core_unprepare(core->parent);
1093 * clk_unprepare - undo preparation of a clock source
1108 clk_core_unprepare_lock(clk->core);
1121 if (core->prepare_count == 0) {
1126 ret = clk_core_prepare(core->parent);
1132 if (core->ops->prepare)
1133 ret = core->ops->prepare(core->hw);
1141 core->prepare_count++;
1150 if (core->flags & CLK_SET_RATE_GATE)
1155 clk_core_unprepare(core->parent);
1173 * clk_prepare - prepare a clock source
1182 * Returns 0 on success, -EERROR otherwise.
1189 return clk_core_prepare_lock(clk->core);
1200 if (WARN(core->enable_count == 0, "%s already disabled\n", core->name))
1203 if (WARN(core->enable_count == 1 && core->flags & CLK_IS_CRITICAL,
1204 "Disabling critical %s\n", core->name))
1207 if (--core->enable_count > 0)
1212 if (core->ops->disable)
1213 core->ops->disable(core->hw);
1217 clk_core_disable(core->parent);
1230 * clk_disable - gate a clock
1236 * SoC-internal clk which is controlled via simple register writes. In the
1246 clk_core_disable_lock(clk->core);
1259 if (WARN(core->prepare_count == 0,
1260 "Enabling unprepared %s\n", core->name))
1261 return -ESHUTDOWN;
1263 if (core->enable_count == 0) {
1264 ret = clk_core_enable(core->parent);
1271 if (core->ops->enable)
1272 ret = core->ops->enable(core->hw);
1277 clk_core_disable(core->parent);
1282 core->enable_count++;
1299 * clk_gate_restore_context - restore context for poweroff
1303 * the gate clocks based on the enable_count. This is done in cases
1306 * helps restore the state of gate clocks.
1310 struct clk_core *core = hw->core;
1312 if (core->enable_count)
1313 core->ops->enable(hw);
1315 core->ops->disable(hw);
1324 hlist_for_each_entry(child, &core->children, child_node) {
1330 if (core->ops && core->ops->save_context)
1331 ret = core->ops->save_context(core->hw);
1340 if (core->ops && core->ops->restore_context)
1341 core->ops->restore_context(core->hw);
1343 hlist_for_each_entry(child, &core->children, child_node)
1348 * clk_save_context - save clock context for poweroff
1376 * clk_restore_context - restore clock context after poweroff
1394 * clk_enable - ungate a clock
1399 * if the operation will never sleep. One example is a SoC-internal clk which
1403 * must be called before clk_enable. Returns 0 on success, -EERROR
1411 return clk_core_enable_lock(clk->core);
1416 * clk_is_enabled_when_prepared - indicate if preparing a clock also enables it.
1420 * making clk_enable()/clk_disable() no-ops, false otherwise.
1432 return clk && !(clk->core->ops->enable && clk->core->ops->disable);
1463 hlist_for_each_entry(child, &core->children, child_node)
1466 if (core->prepare_count)
1469 if (core->flags & CLK_IGNORE_UNUSED)
1474 if (core->ops->unprepare_unused)
1475 core->ops->unprepare_unused(core->hw);
1476 else if (core->ops->unprepare)
1477 core->ops->unprepare(core->hw);
1489 hlist_for_each_entry(child, &core->children, child_node)
1492 if (core->flags & CLK_OPS_PARENT_ENABLE)
1493 clk_core_prepare_enable(core->parent);
1497 if (core->enable_count)
1500 if (core->flags & CLK_IGNORE_UNUSED)
1504 * some gate clocks have special needs during the disable-unused
1510 if (core->ops->disable_unused)
1511 core->ops->disable_unused(core->hw);
1512 else if (core->ops->disable)
1513 core->ops->disable(core->hw);
1519 if (core->flags & CLK_OPS_PARENT_ENABLE)
1520 clk_core_disable_unprepare(core->parent);
1537 pr_warn("clk: Not disabling unused clocks\n");
1541 pr_info("clk: Disabling unused clocks\n");
1583 * Some clock providers hand-craft their clk_rate_requests and
1590 if (!req->min_rate && !req->max_rate)
1592 __func__, core->name);
1594 req->rate = clamp(req->rate, req->min_rate, req->max_rate);
1598 * - if the provider is not protected at all
1599 * - if the calling consumer is the only one which has exclusivity
1603 req->rate = core->rate;
1604 } else if (core->ops->determine_rate) {
1605 return core->ops->determine_rate(core->hw, req);
1606 } else if (core->ops->round_rate) {
1607 rate = core->ops->round_rate(core->hw, req->rate,
1608 &req->best_parent_rate);
1612 req->rate = rate;
1614 return -EINVAL;
1630 req->max_rate = ULONG_MAX;
1635 req->core = core;
1636 req->rate = rate;
1637 clk_core_get_boundaries(core, &req->min_rate, &req->max_rate);
1639 parent = core->parent;
1641 req->best_parent_hw = parent->hw;
1642 req->best_parent_rate = parent->rate;
1644 req->best_parent_hw = NULL;
1645 req->best_parent_rate = 0;
1650 * clk_hw_init_rate_request - Initializes a clk_rate_request
1665 clk_core_init_rate_req(hw->core, req, rate);
1670 * clk_hw_forward_rate_request - Forwards a clk_rate_request to a clock's parent
1689 clk_core_forward_rate_req(hw->core, old_req,
1690 parent->core, req,
1697 return core->ops->determine_rate || core->ops->round_rate;
1708 req->rate = 0;
1715 if (core->flags & CLK_SET_RATE_PARENT) {
1718 clk_core_forward_rate_req(core, req, core->parent, &parent_req, req->rate);
1722 ret = clk_core_round_rate_nolock(core->parent, &parent_req);
1728 req->best_parent_rate = parent_req.rate;
1729 req->rate = parent_req.rate;
1734 req->rate = core->rate;
1739 * __clk_determine_rate - get the closest rate actually supported by a clock
1748 req->rate = 0;
1752 return clk_core_round_rate_nolock(hw->core, req);
1757 * clk_hw_round_rate() - round the given rate for a hw clk
1776 clk_core_init_rate_req(hw->core, &req, rate);
1780 ret = clk_core_round_rate_nolock(hw->core, &req);
1791 * clk_round_rate - round the given rate for a clk
1809 if (clk->exclusive_count)
1810 clk_core_rate_unprotect(clk->core);
1812 clk_core_init_rate_req(clk->core, &req, rate);
1816 ret = clk_core_round_rate_nolock(clk->core, &req);
1820 if (clk->exclusive_count)
1821 clk_core_rate_protect(clk->core);
1833 * __clk_notify - call clk notifier chain
1839 * Triggers a notifier call chain on the clk rate-change notification
1857 if (cn->clk->core == core) {
1858 cnd.clk = cn->clk;
1859 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1885 if (core->parent)
1886 parent_accuracy = core->parent->accuracy;
1888 if (core->ops->recalc_accuracy)
1889 core->accuracy = core->ops->recalc_accuracy(core->hw,
1892 core->accuracy = parent_accuracy;
1894 hlist_for_each_entry(child, &core->children, child_node)
1900 if (core && (core->flags & CLK_GET_ACCURACY_NOCACHE))
1907 * clk_get_accuracy - return the accuracy of clk
1923 accuracy = clk_core_get_accuracy_recalc(clk->core);
1935 if (core->ops->recalc_rate && !clk_pm_runtime_get(core)) {
1936 rate = core->ops->recalc_rate(core->hw, parent_rate);
1964 old_rate = core->rate;
1966 if (core->parent)
1967 parent_rate = core->parent->rate;
1969 core->rate = clk_recalc(core, parent_rate);
1971 core->req_rate = core->rate;
1977 if (core->notifier_count && msg)
1978 __clk_notify(core, msg, old_rate, core->rate);
1980 hlist_for_each_entry(child, &core->children, child_node)
1986 if (core && (core->flags & CLK_GET_RATE_NOCACHE))
1993 * clk_get_rate - return the rate of clk
2009 rate = clk_core_get_rate_recalc(clk->core);
2022 return -EINVAL;
2024 for (i = 0; i < core->num_parents; i++) {
2026 if (core->parents[i].core == parent)
2030 if (core->parents[i].core)
2034 if (core->parents[i].hw) {
2035 if (core->parents[i].hw == parent->hw)
2047 if (core->parents[i].name &&
2048 !strcmp(parent->name, core->parents[i].name))
2052 if (i == core->num_parents)
2053 return -EINVAL;
2055 core->parents[i].core = parent;
2060 * clk_hw_get_parent_index - return the index of the parent clock
2063 * Fetches and returns the index of parent clock. Returns -EINVAL if the given
2071 return -EINVAL;
2073 return clk_fetch_parent_index(hw->core, parent->core);
2084 core->orphan = is_orphan;
2086 hlist_for_each_entry(child, &core->children, child_node)
2092 bool was_orphan = core->orphan;
2094 hlist_del(&core->child_node);
2097 bool becomes_orphan = new_parent->orphan;
2100 if (new_parent->new_child == core)
2101 new_parent->new_child = NULL;
2103 hlist_add_head(&core->child_node, &new_parent->children);
2108 hlist_add_head(&core->child_node, &clk_orphan_list);
2113 core->parent = new_parent;
2120 struct clk_core *old_parent = core->parent;
2143 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2149 if (core->prepare_count) {
2170 if (core->prepare_count) {
2175 /* re-balance ref counting if CLK_OPS_PARENT_ENABLE is set */
2176 if (core->flags & CLK_OPS_PARENT_ENABLE) {
2194 if (parent && core->ops->set_parent)
2195 ret = core->ops->set_parent(core->hw, p_index);
2223 * pre-rate change notifications and returns early if no clks in the
2240 if (core->notifier_count)
2241 ret = __clk_notify(core, PRE_RATE_CHANGE, core->rate, new_rate);
2245 __func__, core->name, ret);
2249 hlist_for_each_entry(child, &core->children, child_node) {
2264 core->new_rate = new_rate;
2265 core->new_parent = new_parent;
2266 core->new_parent_index = p_index;
2268 core->new_child = NULL;
2269 if (new_parent && new_parent != core->parent)
2270 new_parent->new_child = core;
2272 hlist_for_each_entry(child, &core->children, child_node) {
2273 child->new_rate = clk_recalc(child, new_rate);
2274 clk_calc_subtree(child, child->new_rate, NULL, 0);
2299 parent = old_parent = core->parent;
2301 best_parent_rate = parent->rate;
2321 parent = req.best_parent_hw ? req.best_parent_hw->core : NULL;
2325 } else if (!parent || !(core->flags & CLK_SET_RATE_PARENT)) {
2326 /* pass-through clock without adjustable parent */
2327 core->new_rate = core->rate;
2330 /* pass-through clock with adjustable parent */
2332 new_rate = parent->new_rate;
2336 /* some clocks must be gated to change parent */
2338 (core->flags & CLK_SET_PARENT_GATE) && core->prepare_count) {
2340 __func__, core->name);
2345 if (parent && core->num_parents > 1) {
2349 __func__, parent->name, core->name);
2354 if ((core->flags & CLK_SET_RATE_PARENT) && parent &&
2355 best_parent_rate != parent->rate)
2375 if (core->rate == core->new_rate)
2378 if (core->notifier_count) {
2379 ret = __clk_notify(core, event, core->rate, core->new_rate);
2384 hlist_for_each_entry(child, &core->children, child_node) {
2386 if (child->new_parent && child->new_parent != core)
2393 /* handle the new child who might not be in core->children yet */
2394 if (core->new_child) {
2395 tmp_clk = clk_propagate_rate_change(core->new_child, event);
2417 old_rate = core->rate;
2419 if (core->new_parent) {
2420 parent = core->new_parent;
2421 best_parent_rate = core->new_parent->rate;
2422 } else if (core->parent) {
2423 parent = core->parent;
2424 best_parent_rate = core->parent->rate;
2430 if (core->flags & CLK_SET_RATE_UNGATE) {
2435 if (core->new_parent && core->new_parent != core->parent) {
2436 old_parent = __clk_set_parent_before(core, core->new_parent);
2437 trace_clk_set_parent(core, core->new_parent);
2439 if (core->ops->set_rate_and_parent) {
2441 core->ops->set_rate_and_parent(core->hw, core->new_rate,
2443 core->new_parent_index);
2444 } else if (core->ops->set_parent) {
2445 core->ops->set_parent(core->hw, core->new_parent_index);
2448 trace_clk_set_parent_complete(core, core->new_parent);
2449 __clk_set_parent_after(core, core->new_parent, old_parent);
2452 if (core->flags & CLK_OPS_PARENT_ENABLE)
2455 trace_clk_set_rate(core, core->new_rate);
2457 if (!skip_set_rate && core->ops->set_rate)
2458 core->ops->set_rate(core->hw, core->new_rate, best_parent_rate);
2460 trace_clk_set_rate_complete(core, core->new_rate);
2462 core->rate = clk_recalc(core, best_parent_rate);
2464 if (core->flags & CLK_SET_RATE_UNGATE) {
2469 if (core->flags & CLK_OPS_PARENT_ENABLE)
2472 if (core->notifier_count && old_rate != core->rate)
2473 __clk_notify(core, POST_RATE_CHANGE, old_rate, core->rate);
2475 if (core->flags & CLK_RECALC_NEW_RATES)
2476 (void)clk_calc_new_rates(core, core->new_rate);
2482 hlist_for_each_entry_safe(child, tmp, &core->children, child_node) {
2484 if (child->new_parent && child->new_parent != core)
2489 /* handle the new child who might not be in core->children yet */
2490 if (core->new_child)
2491 clk_change_rate(core->new_child);
2542 /* fail on a direct rate set of a protected provider */
2544 return -EBUSY;
2549 return -EINVAL;
2559 fail_clk->name);
2561 ret = -EBUSY;
2568 core->req_rate = req_rate;
2576 * clk_set_rate - specify a new rate for clk
2592 * rates for the clocks and fires off POST_RATE_CHANGE notifiers.
2594 * Returns 0 on success, -EERROR otherwise.
2606 if (clk->exclusive_count)
2607 clk_core_rate_unprotect(clk->core);
2609 ret = clk_core_set_rate_nolock(clk->core, rate);
2611 if (clk->exclusive_count)
2612 clk_core_rate_protect(clk->core);
2621 * clk_set_rate_exclusive - specify a new rate and get exclusive control
2637 * Returns 0 on success, -EERROR otherwise.
2655 ret = clk_core_set_rate_nolock(clk->core, rate);
2657 clk_core_rate_protect(clk->core);
2658 clk->exclusive_count++;
2679 trace_clk_set_rate_range(clk->core, min, max);
2683 __func__, clk->core->name, clk->dev_id, clk->con_id,
2685 return -EINVAL;
2688 if (clk->exclusive_count)
2689 clk_core_rate_unprotect(clk->core);
2692 old_min = clk->min_rate;
2693 old_max = clk->max_rate;
2694 clk->min_rate = min;
2695 clk->max_rate = max;
2697 if (!clk_core_check_boundaries(clk->core, min, max)) {
2698 ret = -EINVAL;
2702 rate = clk->core->req_rate;
2703 if (clk->core->flags & CLK_GET_RATE_NOCACHE)
2704 rate = clk_core_get_rate_recalc(clk->core);
2717 * broken, clock protected, etc) but also because:
2718 * - round_rate() was not favorable and fell on the wrong
2720 * - the determine_rate() callback does not really check for
2724 ret = clk_core_set_rate_nolock(clk->core, rate);
2727 clk->min_rate = old_min;
2728 clk->max_rate = old_max;
2732 if (clk->exclusive_count)
2733 clk_core_rate_protect(clk->core);
2739 * clk_set_rate_range - set a rate range for a clock source
2764 * clk_set_min_rate - set a minimum clock rate for a clock source
2775 trace_clk_set_min_rate(clk->core, rate);
2777 return clk_set_rate_range(clk, rate, clk->max_rate);
2782 * clk_set_max_rate - set a maximum clock rate for a clock source
2793 trace_clk_set_max_rate(clk->core, rate);
2795 return clk_set_rate_range(clk, clk->min_rate, rate);
2800 * clk_get_parent - return the parent of a clk
2803 * Simply returns clk->parent. Returns NULL if clk is NULL.
2813 /* TODO: Create a per-user clk and change callers to call clk_put */
2814 parent = !clk->core->parent ? NULL : clk->core->parent->hw->clk;
2825 if (core->num_parents > 1 && core->ops->get_parent)
2826 index = core->ops->get_parent(core->hw);
2844 clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
2848 * clk_has_parent - check if a clock is a possible parent for another
2859 /* NULL clocks should be nops, so return success if either is NULL. */
2863 return clk_core_has_parent(clk->core, parent->core);
2879 if (core->parent == parent)
2882 /* verify ops for multi-parent clks */
2883 if (core->num_parents > 1 && !core->ops->set_parent)
2884 return -EPERM;
2886 /* check that we are allowed to re-parent if the clock is in use */
2887 if ((core->flags & CLK_SET_PARENT_GATE) && core->prepare_count)
2888 return -EBUSY;
2891 return -EBUSY;
2898 __func__, parent->name, core->name);
2901 p_rate = parent->rate;
2915 /* do the re-parent */
2934 return clk_core_set_parent_nolock(hw->core, parent->core);
2939 * clk_set_parent - switch the parent of a mux clk
2943 * Re-parent clk to use parent as its new input source. If clk is in
2953 * Returns 0 on success, -EERROR otherwise.
2964 if (clk->exclusive_count)
2965 clk_core_rate_unprotect(clk->core);
2967 ret = clk_core_set_parent_nolock(clk->core,
2968 parent ? parent->core : NULL);
2970 if (clk->exclusive_count)
2971 clk_core_rate_protect(clk->core);
2981 int ret = -EINVAL;
2989 return -EBUSY;
2993 if (core->ops->set_phase) {
2994 ret = core->ops->set_phase(core->hw, degrees);
2996 core->phase = degrees;
3005 * clk_set_phase - adjust the phase shift of a clock signal
3010 * degrees. Returns 0 on success, -EERROR otherwise.
3014 * phase locked-loop clock signal generators we may shift phase with
3038 if (clk->exclusive_count)
3039 clk_core_rate_unprotect(clk->core);
3041 ret = clk_core_set_phase_nolock(clk->core, degrees);
3043 if (clk->exclusive_count)
3044 clk_core_rate_protect(clk->core);
3057 if (!core->ops->get_phase)
3061 ret = core->ops->get_phase(core->hw);
3063 core->phase = ret;
3069 * clk_get_phase - return the phase shift of a clock signal
3073 * -EERROR.
3083 ret = clk_core_get_phase(clk->core);
3093 core->duty.num = 1;
3094 core->duty.den = 2;
3101 struct clk_duty *duty = &core->duty;
3104 if (!core->ops->get_duty_cycle)
3107 ret = core->ops->get_duty_cycle(core->hw, duty);
3112 if (duty->den == 0 || duty->num > duty->den) {
3113 ret = -EINVAL;
3128 if (core->parent &&
3129 core->flags & CLK_DUTY_CYCLE_PARENT) {
3130 ret = clk_core_update_duty_cycle_nolock(core->parent);
3131 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3150 return -EBUSY;
3154 if (!core->ops->set_duty_cycle)
3157 ret = core->ops->set_duty_cycle(core->hw, duty);
3159 memcpy(&core->duty, duty, sizeof(*duty));
3171 if (core->parent &&
3172 core->flags & (CLK_DUTY_CYCLE_PARENT | CLK_SET_RATE_PARENT)) {
3173 ret = clk_core_set_duty_cycle_nolock(core->parent, duty);
3174 memcpy(&core->duty, &core->parent->duty, sizeof(core->duty));
3181 * clk_set_duty_cycle - adjust the duty cycle ratio of a clock signal
3201 return -EINVAL;
3208 if (clk->exclusive_count)
3209 clk_core_rate_unprotect(clk->core);
3211 ret = clk_core_set_duty_cycle_nolock(clk->core, &duty);
3213 if (clk->exclusive_count)
3214 clk_core_rate_protect(clk->core);
3225 struct clk_duty *duty = &core->duty;
3232 ret = mult_frac(scale, duty->num, duty->den);
3240 * clk_get_scaled_duty_cycle - return the duty cycle ratio of a clock signal
3252 return clk_core_get_scaled_duty_cycle(clk->core, scale);
3257 * clk_is_match - check if two clk's point to the same hardware clock
3273 /* true if clk->core pointers match. Avoid dereferencing garbage */
3275 if (p->core == q->core)
3304 seq_printf(s, "%*s%-*s %-7d %-8d %-8d %-11lu %-10lu ",
3306 35 - level * 3, c->name,
3307 c->enable_count, c->prepare_count, c->protect_count,
3313 seq_printf(s, "%-5d", phase);
3315 seq_puts(s, "-----");
3317 seq_printf(s, " %-6d", clk_core_get_scaled_duty_cycle(c, 100000));
3319 if (c->ops->is_enabled)
3321 else if (!c->ops->enable)
3326 hlist_for_each_entry(clk_user, &c->clks, clks_node) {
3327 seq_printf(s, "%*s%-*s %-25s\n",
3330 clk_user->dev_id ? clk_user->dev_id : "deviceless",
3331 clk_user->con_id ? clk_user->con_id : "no_connection_id");
3345 hlist_for_each_entry(child, &c->children, child_node)
3352 struct hlist_head **lists = s->private;
3357 seq_puts(s, "---------------------------------------------------------------------------------------------------------------------------------------------\n");
3384 seq_printf(s, "\"%s\": { ", c->name);
3385 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
3386 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
3387 seq_printf(s, "\"protect_count\": %d,", c->protect_count);
3405 hlist_for_each_entry(child, &c->children, child_node) {
3417 struct hlist_head **lists = s->private;
3487 ret = clk_prepare_enable(core->hw->clk);
3489 clk_disable_unprepare(core->hw->clk);
3498 *val = core->enable_count && core->prepare_count;
3530 *val = core->phase;
3558 struct clk_core *core = s->private;
3559 unsigned long flags = core->flags;
3589 * 4. Fetch parent clock's clock-output-name if DT index was set
3597 seq_puts(s, parent->name);
3598 } else if (core->parents[i].name) {
3599 seq_puts(s, core->parents[i].name);
3600 } else if (core->parents[i].fw_name) {
3601 seq_printf(s, "<%s>(fw)", core->parents[i].fw_name);
3603 if (core->parents[i].index >= 0)
3604 name = of_clk_get_parent_name(core->of_node, core->parents[i].index);
3616 struct clk_core *core = s->private;
3619 for (i = 0; i < core->num_parents - 1; i++)
3630 struct clk_core *core = s->private;
3632 if (core->parent)
3633 seq_printf(s, "%s\n", core->parent->name);
3643 struct seq_file *s = file->private_data;
3644 struct clk_core *core = s->private;
3655 return -ENOENT;
3677 struct clk_core *core = s->private;
3678 struct clk_duty *duty = &core->duty;
3680 seq_printf(s, "%u/%u\n", duty->num, duty->den);
3688 struct clk_core *core = s->private;
3702 struct clk_core *core = s->private;
3721 root = debugfs_create_dir(core->name, pdentry);
3722 core->dentry = root;
3728 debugfs_create_ulong("clk_accuracy", 0444, root, &core->accuracy);
3732 debugfs_create_u32("clk_prepare_count", 0444, root, &core->prepare_count);
3733 debugfs_create_u32("clk_enable_count", 0444, root, &core->enable_count);
3734 debugfs_create_u32("clk_protect_count", 0444, root, &core->protect_count);
3735 debugfs_create_u32("clk_notifier_count", 0444, root, &core->notifier_count);
3742 if (core->num_parents > 1)
3747 if (core->num_parents > 0)
3751 if (core->num_parents > 1)
3755 if (core->ops->debug_init)
3756 core->ops->debug_init(core->hw, core->dentry);
3760 * clk_debug_register - add a clk node to the debugfs clk directory
3770 hlist_add_head(&core->debug_node, &clk_debug_list);
3777 * clk_debug_unregister - remove a clk node from the debugfs clk directory
3781 * debugfs clk directory if clk->dentry points to debugfs created by
3787 hlist_del_init(&core->debug_node);
3788 debugfs_remove_recursive(core->dentry);
3789 core->dentry = NULL;
3794 * clk_debug_init - lazily populate the debugfs clk directory
3798 * populates the debugfs clk directory once at boot-time when we know that
3799 * debugfs is setup. It should only be called once at boot-time, all other clks
3858 * walk the list of orphan clocks and reparent any that newly finds a
3867 * clock. This is important for CLK_IS_CRITICAL clocks, which
3885 * 'req_rate' is set to something non-zero so that
3888 orphan->req_rate = orphan->rate;
3894 * __clk_core_init - initialize the data structures in a struct clk_core
3910 * Set hw->core after grabbing the prepare_lock to synchronize with
3911 * callers of clk_core_fill_parent_index() where we treat hw->core
3915 core->hw->core = core;
3922 if (clk_core_lookup(core->name)) {
3924 __func__, core->name);
3925 ret = -EEXIST;
3929 /* check that clk_ops are sane. See Documentation/driver-api/clk.rst */
3930 if (core->ops->set_rate &&
3931 !((core->ops->round_rate || core->ops->determine_rate) &&
3932 core->ops->recalc_rate)) {
3934 __func__, core->name);
3935 ret = -EINVAL;
3939 if (core->ops->set_parent && !core->ops->get_parent) {
3941 __func__, core->name);
3942 ret = -EINVAL;
3946 if (core->ops->set_parent && !core->ops->determine_rate) {
3948 __func__, core->name);
3949 ret = -EINVAL;
3953 if (core->num_parents > 1 && !core->ops->get_parent) {
3955 __func__, core->name);
3956 ret = -EINVAL;
3960 if (core->ops->set_rate_and_parent &&
3961 !(core->ops->set_parent && core->ops->set_rate)) {
3963 __func__, core->name);
3964 ret = -EINVAL;
3969 * optional platform-specific magic
3982 if (core->ops->init) {
3983 ret = core->ops->init(core->hw);
3988 parent = core->parent = __clk_init_parent(core);
3991 * Populate core->parent if parent has already been clk_core_init'd. If
3997 * clocks and re-parent any that are children of the clock currently
4001 hlist_add_head(&core->child_node, &parent->children);
4002 core->orphan = parent->orphan;
4003 } else if (!core->num_parents) {
4004 hlist_add_head(&core->child_node, &clk_root_list);
4005 core->orphan = false;
4007 hlist_add_head(&core->child_node, &clk_orphan_list);
4008 core->orphan = true;
4013 * .recalc_accuracy. For simple clocks and lazy developers the default
4018 if (core->ops->recalc_accuracy)
4019 core->accuracy = core->ops->recalc_accuracy(core->hw,
4022 core->accuracy = parent->accuracy;
4024 core->accuracy = 0;
4035 core->name);
4046 * simple clocks and lazy developers the default fallback is to use the
4050 if (core->ops->recalc_rate)
4051 rate = core->ops->recalc_rate(core->hw,
4054 rate = parent->rate;
4057 core->rate = core->req_rate = rate;
4060 * Enable CLK_IS_CRITICAL clocks so newly added critical clocks
4062 * reparenting clocks
4064 if (core->flags & CLK_IS_CRITICAL) {
4068 __func__, core->name);
4075 __func__, core->name);
4086 hlist_del_init(&core->child_node);
4087 core->hw->core = NULL;
4099 * clk_core_link_consumer - Add a clk consumer to the list of consumers in a clk_core
4106 hlist_add_head(&clk->clks_node, &core->clks);
4111 * clk_core_unlink_consumer - Remove a clk consumer from the list of consumers in a clk_core
4117 hlist_del(&clk->clks_node);
4121 * alloc_clk - Allocate a clk consumer, but leave it unlinked to the clk_core
4135 return ERR_PTR(-ENOMEM);
4137 clk->core = core;
4138 clk->dev_id = dev_id;
4139 clk->con_id = kstrdup_const(con_id, GFP_KERNEL);
4140 clk->max_rate = ULONG_MAX;
4146 * free_clk - Free a clk consumer
4154 kfree_const(clk->con_id);
4180 core = hw->core;
4184 clk->dev = dev;
4186 if (!try_module_get(core->owner)) {
4188 return ERR_PTR(-ENOENT);
4191 kref_get(&core->ref);
4198 * clk_hw_get_clk - get clk consumer given an clk_hw
4209 struct device *dev = hw->core->dev;
4222 return -EINVAL;
4228 return -ENOMEM;
4236 u8 num_parents = init->num_parents;
4237 const char * const *parent_names = init->parent_names;
4238 const struct clk_hw **parent_hws = init->parent_hws;
4239 const struct clk_parent_data *parent_data = init->parent_data;
4247 * Avoid unnecessary string look-ups of clk_core's possible parents by
4251 core->parents = parents;
4253 return -ENOMEM;
4257 parent->index = -1;
4262 __func__, core->name);
4263 ret = clk_cpy_name(&parent->name, parent_names[i],
4266 parent->hw = parent_data[i].hw;
4267 parent->index = parent_data[i].index;
4268 ret = clk_cpy_name(&parent->fw_name,
4271 ret = clk_cpy_name(&parent->name,
4275 parent->hw = parent_hws[i];
4277 ret = -EINVAL;
4285 } while (--i >= 0);
4297 int i = core->num_parents;
4299 if (!core->num_parents)
4302 while (--i >= 0) {
4303 kfree_const(core->parents[i].name);
4304 kfree_const(core->parents[i].fw_name);
4307 kfree(core->parents);
4315 if (core->rpm_enabled) {
4317 hlist_del(&core->rpm_node);
4322 kfree_const(core->name);
4331 const struct clk_init_data *init = hw->init;
4336 * we catch use of hw->init early on in the core.
4338 hw->init = NULL;
4342 ret = -ENOMEM;
4346 kref_init(&core->ref);
4348 core->name = kstrdup_const(init->name, GFP_KERNEL);
4349 if (!core->name) {
4350 ret = -ENOMEM;
4354 if (WARN_ON(!init->ops)) {
4355 ret = -EINVAL;
4358 core->ops = init->ops;
4360 core->dev = dev;
4362 core->of_node = np;
4363 if (dev && dev->driver)
4364 core->owner = dev->driver->owner;
4365 core->hw = hw;
4366 core->flags = init->flags;
4367 core->num_parents = init->num_parents;
4368 core->min_rate = 0;
4369 core->max_rate = ULONG_MAX;
4375 INIT_HLIST_HEAD(&core->clks);
4381 hw->clk = alloc_clk(core, NULL, NULL);
4382 if (IS_ERR(hw->clk)) {
4383 ret = PTR_ERR(hw->clk);
4387 clk_core_link_consumer(core, hw->clk);
4391 return hw->clk;
4394 clk_core_unlink_consumer(hw->clk);
4397 free_clk(hw->clk);
4398 hw->clk = NULL;
4404 kref_put(&core->ref, __clk_release);
4410 * dev_or_parent_of_node() - Get device node of @dev or @dev's parent
4414 * @dev->parent if dev doesn't have a device node, or NULL if neither
4415 * @dev or @dev->parent have a device node.
4426 np = dev_of_node(dev->parent);
4432 * clk_register - allocate a new clock, register it and return an opaque cookie
4434 * @hw: link to hardware-specific clock data
4451 * clk_hw_register - register a clk_hw and return an error code
4453 * @hw: link to hardware-specific clock data
4468 * of_clk_hw_register - register a clk_hw and return an error code
4470 * @hw: link to hardware-specific clock data
4485 * Empty clk_ops for unregistered clocks. These are used temporarily
4491 return -ENXIO;
4502 return -ENXIO;
4507 return -ENXIO;
4513 return -ENXIO;
4532 for (i = 0; i < root->num_parents; i++)
4533 if (root->parents[i].core == target)
4534 root->parents[i].core = NULL;
4536 hlist_for_each_entry(child, &root->children, child_node)
4555 * clk_unregister - unregister a currently registered clock
4566 clk_debug_unregister(clk->core);
4570 ops = clk->core->ops;
4573 clk->core->name);
4582 clk->core->ops = &clk_nodrv_ops;
4585 if (ops->terminate)
4586 ops->terminate(clk->core->hw);
4588 if (!hlist_empty(&clk->core->children)) {
4593 hlist_for_each_entry_safe(child, t, &clk->core->children,
4598 clk_core_evict_parent_cache(clk->core);
4600 hlist_del_init(&clk->core->child_node);
4602 if (clk->core->prepare_count)
4604 __func__, clk->core->name);
4606 if (clk->core->protect_count)
4607 pr_warn("%s: unregistering protected clock: %s\n",
4608 __func__, clk->core->name);
4611 kref_put(&clk->core->ref, __clk_release);
4617 * clk_hw_unregister - unregister a currently registered clk_hw
4618 * @hw: hardware-specific clock data to unregister
4622 clk_unregister(hw->clk);
4637 * devm_clk_register - resource managed clk_register()
4639 * @hw: link to hardware-specific clock data
4643 * Clocks returned from this function are automatically clk_unregister()ed on
4653 return ERR_PTR(-ENOMEM);
4668 * devm_clk_hw_register - resource managed clk_hw_register()
4670 * @hw: link to hardware-specific clock data
4672 * Managed clk_hw_register(). Clocks registered by this function are
4683 return -ENOMEM;
4703 * devm_clk_hw_get_clk - resource managed clk_hw_get_clk()
4708 * Managed clk_hw_get_clk(). Clocks got with this function are
4722 WARN_ON_ONCE(dev != hw->core->dev);
4726 return ERR_PTR(-ENOMEM);
4758 if (WARN_ON(clk->exclusive_count)) {
4760 clk->core->protect_count -= (clk->exclusive_count - 1);
4761 clk_core_rate_unprotect(clk->core);
4762 clk->exclusive_count = 0;
4768 if (clk->min_rate > 0 || clk->max_rate < ULONG_MAX)
4773 owner = clk->core->owner;
4774 kref_put(&clk->core->ref, __clk_release);
4782 * clk_notifier_register - add a clk rate change notifier
4789 * re-enter into the clk framework by calling any top-level clk APIs;
4796 * clk_notifier_register() must be called from non-atomic context.
4797 * Returns -EINVAL if called with null arguments, -ENOMEM upon
4804 int ret = -ENOMEM;
4807 return -EINVAL;
4813 if (cn->clk == clk)
4821 cn->clk = clk;
4822 srcu_init_notifier_head(&cn->notifier_head);
4824 list_add(&cn->node, &clk_notifier_list);
4827 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
4829 clk->core->notifier_count++;
4839 * clk_notifier_unregister - remove a clk rate change notifier
4846 * Returns -EINVAL if called with null arguments; otherwise, passes
4852 int ret = -ENOENT;
4855 return -EINVAL;
4860 if (cn->clk == clk) {
4861 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
4863 clk->core->notifier_count--;
4866 if (!cn->notifier_head.head) {
4867 srcu_cleanup_notifier_head(&cn->notifier_head);
4868 list_del(&cn->node);
4890 clk_notifier_unregister(devres->clk, devres->nb);
4903 return -ENOMEM;
4907 devres->clk = clk;
4908 devres->nb = nb;
4927 * struct of_clk_provider - Clock provider registration structure
4968 unsigned int idx = clkspec->args[0];
4970 if (idx >= clk_data->clk_num) {
4972 return ERR_PTR(-EINVAL);
4975 return clk_data->clks[idx];
4983 unsigned int idx = clkspec->args[0];
4985 if (idx >= hw_data->num) {
4987 return ERR_PTR(-EINVAL);
4990 return hw_data->hws[idx];
4995 * of_clk_add_provider() - Register a clock provider for a node
5015 return -ENOMEM;
5017 cp->node = of_node_get(np);
5018 cp->data = data;
5019 cp->get = clk_src_get;
5022 list_add(&cp->link, &of_clk_providers);
5032 fwnode_dev_initialized(&np->fwnode, true);
5039 * of_clk_add_hw_provider() - Register a clock provider for a node
5057 return -ENOMEM;
5059 cp->node = of_node_get(np);
5060 cp->data = data;
5061 cp->get_hw = get;
5064 list_add(&cp->link, &of_clk_providers);
5074 fwnode_dev_initialized(&np->fwnode, true);
5087 * for cases like MFD sub-devices where the child device driver wants to use
5088 * devm_*() APIs but not list the device in DT as a sub-node.
5094 np = dev->of_node;
5095 parent_np = dev->parent ? dev->parent->of_node : NULL;
5097 if (!of_property_present(np, "#clock-cells"))
5098 if (of_property_present(parent_np, "#clock-cells"))
5105 * devm_of_clk_add_hw_provider() - Managed clk provider node registration
5111 * node or if the device node lacks of clock provider information (#clock-cells)
5113 * has the #clock-cells then it is used in registration. Provider is
5129 return -ENOMEM;
5145 * of_clk_del_provider() - Remove a previously registered clock provider
5157 if (cp->node == np) {
5158 list_del(&cp->link);
5159 fwnode_dev_initialized(&np->fwnode, false);
5160 of_node_put(cp->node);
5170 * of_parse_clkspec() - Parse a DT clock specifier for a given device node
5176 * Parses a device node's "clocks" and "clock-names" properties to find the
5179 * parsing error. The @index argument is ignored if @name is non-NULL.
5183 * phandle1: clock-controller@1 {
5184 * #clock-cells = <2>;
5187 * phandle2: clock-controller@2 {
5188 * #clock-cells = <1>;
5191 * clock-consumer@3 {
5192 * clocks = <&phandle1 1 2 &phandle2 3>;
5193 * clock-names = "name1", "name2";
5196 * To get a device_node for `clock-controller@2' node you may call this
5199 * of_parse_clkspec(clock-consumer@3, -1, "name2", &args);
5200 * of_parse_clkspec(clock-consumer@3, 1, NULL, &args);
5201 * of_parse_clkspec(clock-consumer@3, 1, "name2", &args);
5203 * Return: 0 upon successfully parsing the clock specifier. Otherwise, -ENOENT
5204 * if @name is NULL or -EINVAL if @name is non-NULL and it can't be found in
5205 * the "clock-names" property of @np.
5210 int ret = -ENOENT;
5215 * For named clocks, first look up the name in the
5216 * "clock-names" property. If it cannot be found, then index
5218 * return -EINVAL.
5221 index = of_property_match_string(np, "clock-names", name);
5222 ret = of_parse_phandle_with_args(np, "clocks", "#clock-cells",
5231 * has a "clock-ranges" property, then we can try one of its
5232 * clocks.
5234 np = np->parent;
5235 if (np && !of_property_present(np, "clock-ranges"))
5249 if (provider->get_hw)
5250 return provider->get_hw(clkspec, provider->data);
5252 clk = provider->get(clkspec, provider->data);
5262 struct clk_hw *hw = ERR_PTR(-EPROBE_DEFER);
5265 return ERR_PTR(-EINVAL);
5269 if (provider->node == clkspec->np) {
5281 * of_clk_get_from_provider() - Lookup a clock from a clock provider
5324 return __of_clk_get(np, index, np->full_name, NULL);
5329 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
5333 * This function parses the clocks and clock-names properties,
5340 return ERR_PTR(-ENOENT);
5342 return __of_clk_get(np, 0, np->full_name, name);
5347 * of_clk_get_parent_count() - Count the number of clocks a device node has
5350 * Returns: The number of clocks that are possible parents of this node
5356 count = of_count_phandle_with_args(np, "clocks", "#clock-cells");
5374 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", index,
5383 * specified into an array offset for the clock-output-names property.
5385 of_property_for_each_u32(clkspec.np, "clock-indices", pv) {
5393 /* We went off the end of 'clock-indices' without finding it */
5394 if (of_property_present(clkspec.np, "clock-indices") && !found)
5397 if (of_property_read_string_index(clkspec.np, "clock-output-names",
5404 * the clock as long as #clock-cells = 0.
5409 clk_name = clkspec.np->name;
5425 * of_clk_parent_fill() - Fill @parents with names of @np's parents and return
5471 if (PTR_ERR(clk) == -EPROBE_DEFER)
5487 * of_clk_detect_critical() - set CLK_IS_CRITICAL flag from Device Tree
5490 * @flags: pointer to top-level framework flags
5492 * Detects if the clock-critical property exists and, if so, sets the
5496 * bindings, such as the one-clock-per-node style that are outdated.
5510 return -EINVAL;
5512 of_property_for_each_u32(np, "clock-critical", idx)
5520 * of_clk_init() - Scan and init clock providers from the DT
5539 /* First prepare the list of the clocks providers */
5550 list_del(&clk_provider->node);
5551 of_node_put(clk_provider->np);
5558 parent->clk_init_cb = match->data;
5559 parent->np = of_node_get(np);
5560 list_add_tail(&parent->node, &clk_provider_list);
5567 if (force || parent_ready(clk_provider->np)) {
5570 of_node_set_flag(clk_provider->np,
5573 clk_provider->clk_init_cb(clk_provider->np);
5574 of_clk_set_defaults(clk_provider->np, true);
5576 list_del(&clk_provider->node);
5577 of_node_put(clk_provider->np);