Lines Matching +full:clk +full:- +full:out +full:- +full:frequency
1 // SPDX-License-Identifier: GPL-2.0
5 #include <linux/clk.h>
6 #include <linux/clk-provider.h>
13 #include <dt-bindings/clock/maxim,max9485.h>
35 unsigned long out; member
40 * Ordered by frequency. For frequency the hardware can generate with
78 struct clk *xclk;
96 drvdata->reg_value &= ~mask; in max9485_update_bits()
97 drvdata->reg_value |= value; in max9485_update_bits()
99 dev_dbg(&drvdata->client->dev, in max9485_update_bits()
100 "updating mask 0x%02x value 0x%02x -> 0x%02x\n", in max9485_update_bits()
101 mask, value, drvdata->reg_value); in max9485_update_bits()
103 ret = i2c_master_send(drvdata->client, in max9485_update_bits()
104 &drvdata->reg_value, in max9485_update_bits()
105 sizeof(drvdata->reg_value)); in max9485_update_bits()
114 return max9485_update_bits(clk_hw->drvdata, in max9485_clk_prepare()
115 clk_hw->enable_bit, in max9485_clk_prepare()
116 clk_hw->enable_bit); in max9485_clk_prepare()
123 max9485_update_bits(clk_hw->drvdata, clk_hw->enable_bit, 0); in max9485_clk_unprepare()
127 * CLKOUT - configurable clock output
135 for (entry = max9485_rates; entry->out != 0; entry++) in max9485_clkout_set_rate()
136 if (entry->out == rate) in max9485_clkout_set_rate()
139 if (entry->out == 0) in max9485_clkout_set_rate()
140 return -EINVAL; in max9485_clkout_set_rate()
142 return max9485_update_bits(clk_hw->drvdata, in max9485_clkout_set_rate()
144 entry->reg_value); in max9485_clkout_set_rate()
151 struct max9485_driver_data *drvdata = clk_hw->drvdata; in max9485_clkout_recalc_rate()
152 u8 val = drvdata->reg_value & MAX9485_FREQ_MASK; in max9485_clkout_recalc_rate()
155 for (entry = max9485_rates; entry->out != 0; entry++) in max9485_clkout_recalc_rate()
156 if (val == entry->reg_value) in max9485_clkout_recalc_rate()
157 return entry->out; in max9485_clkout_recalc_rate()
167 for (curr = max9485_rates; curr->out != 0; curr++) { in max9485_clkout_round_rate()
169 if (curr->out == rate) in max9485_clkout_round_rate()
173 * Find the first entry that has a frequency higher than the in max9485_clkout_round_rate()
176 if (curr->out > rate) { in max9485_clkout_round_rate()
181 * lowest possible frequency. in max9485_clkout_round_rate()
184 return curr->out; in max9485_clkout_round_rate()
190 mid = prev->out + ((curr->out - prev->out) / 2); in max9485_clkout_round_rate()
192 return (mid > rate) ? prev->out : curr->out; in max9485_clkout_round_rate()
199 return prev->out; in max9485_clkout_round_rate()
212 .parent_index = -1,
221 .parent_index = -1,
252 unsigned int idx = clkspec->args[0]; in max9485_of_clk_get()
254 return &drvdata->hw[idx].hw; in max9485_of_clk_get()
260 struct device *dev = &client->dev; in max9485_i2c_probe()
266 return -ENOMEM; in max9485_i2c_probe()
268 drvdata->xclk = devm_clk_get(dev, "xclk"); in max9485_i2c_probe()
269 if (IS_ERR(drvdata->xclk)) in max9485_i2c_probe()
270 return PTR_ERR(drvdata->xclk); in max9485_i2c_probe()
272 xclk_name = __clk_get_name(drvdata->xclk); in max9485_i2c_probe()
274 drvdata->supply = devm_regulator_get(dev, "vdd"); in max9485_i2c_probe()
275 if (IS_ERR(drvdata->supply)) in max9485_i2c_probe()
276 return PTR_ERR(drvdata->supply); in max9485_i2c_probe()
278 ret = regulator_enable(drvdata->supply); in max9485_i2c_probe()
282 drvdata->reset_gpio = in max9485_i2c_probe()
284 if (IS_ERR(drvdata->reset_gpio)) in max9485_i2c_probe()
285 return PTR_ERR(drvdata->reset_gpio); in max9485_i2c_probe()
288 drvdata->client = client; in max9485_i2c_probe()
290 ret = i2c_master_recv(drvdata->client, &drvdata->reg_value, in max9485_i2c_probe()
291 sizeof(drvdata->reg_value)); in max9485_i2c_probe()
301 if (of_property_read_string_index(dev->of_node, in max9485_i2c_probe()
302 "clock-output-names", in max9485_i2c_probe()
304 drvdata->hw[i].init.name = name; in max9485_i2c_probe()
306 drvdata->hw[i].init.name = max9485_clks[i].name; in max9485_i2c_probe()
309 drvdata->hw[i].init.ops = &max9485_clks[i].ops; in max9485_i2c_probe()
310 drvdata->hw[i].init.num_parents = 1; in max9485_i2c_probe()
311 drvdata->hw[i].init.flags = 0; in max9485_i2c_probe()
314 drvdata->hw[i].init.parent_names = in max9485_i2c_probe()
315 &drvdata->hw[parent_index].init.name; in max9485_i2c_probe()
316 drvdata->hw[i].init.flags |= CLK_SET_RATE_PARENT; in max9485_i2c_probe()
318 drvdata->hw[i].init.parent_names = &xclk_name; in max9485_i2c_probe()
321 drvdata->hw[i].enable_bit = max9485_clks[i].enable_bit; in max9485_i2c_probe()
322 drvdata->hw[i].hw.init = &drvdata->hw[i].init; in max9485_i2c_probe()
323 drvdata->hw[i].drvdata = drvdata; in max9485_i2c_probe()
325 ret = devm_clk_hw_register(dev, &drvdata->hw[i].hw); in max9485_i2c_probe()
338 gpiod_set_value_cansleep(drvdata->reset_gpio, 0); in max9485_suspend()
349 gpiod_set_value_cansleep(drvdata->reset_gpio, 1); in max9485_resume()
351 ret = i2c_master_send(client, &drvdata->reg_value, in max9485_resume()
352 sizeof(drvdata->reg_value)); in max9485_resume()