1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
13  * DOC: basic fixed multiplier and divider clock that cannot gate
16  * prepare - clk_prepare only ensures that parents are prepared
17  * enable - clk_enable only ensures that parents are enabled
18  * rate - rate is fixed.  clk->rate = parent->rate / div * mult
19  * parent - fixed parent.  No clk_set_parent support
26 	unsigned long long int rate;  in clk_factor_recalc_rate()  local
28 	rate = (unsigned long long int)parent_rate * fix->mult;  in clk_factor_recalc_rate()
29 	do_div(rate, fix->div);  in clk_factor_recalc_rate()
30 	return (unsigned long)rate;  in clk_factor_recalc_rate()
33 static long clk_factor_round_rate(struct clk_hw *hw, unsigned long rate,  in clk_factor_round_rate()  argument
41 		best_parent = (rate / fix->mult) * fix->div;  in clk_factor_round_rate()
45 	return (*prate / fix->div) * fix->mult;  in clk_factor_round_rate()
48 static int clk_factor_set_rate(struct clk_hw *hw, unsigned long rate,  in clk_factor_set_rate()  argument
65 	if (fix->flags & CLK_FIXED_FACTOR_FIXED_ACCURACY)  in clk_factor_recalc_accuracy()
66 		return fix->acc;  in clk_factor_recalc_accuracy()
88 	clk_hw_unregister(&fix->hw);  in devm_clk_hw_register_fixed_factor_release()
105 		return ERR_PTR(-EINVAL);  in __clk_hw_register_fixed_factor()
113 		return ERR_PTR(-ENOMEM);  in __clk_hw_register_fixed_factor()
116 	fix->mult = mult;  in __clk_hw_register_fixed_factor()
117 	fix->div = div;  in __clk_hw_register_fixed_factor()
118 	fix->hw.init = &init;  in __clk_hw_register_fixed_factor()
119 	fix->acc = acc;  in __clk_hw_register_fixed_factor()
120 	fix->flags = fixflags;  in __clk_hw_register_fixed_factor()
133 	hw = &fix->hw;  in __clk_hw_register_fixed_factor()
151  * devm_clk_hw_register_fixed_factor_index - Register a fixed factor clock with
156  * @flags: fixed factor flags
160  * Return: Pointer to fixed factor clk_hw structure that was registered or
175  * devm_clk_hw_register_fixed_factor_parent_hw - Register a fixed factor clock with
180  * @flags: fixed factor flags
184  * Return: Pointer to fixed factor clk_hw structure that was registered or
191 	const struct clk_parent_data pdata = { .index = -1 };  in devm_clk_hw_register_fixed_factor_parent_hw()
202 	const struct clk_parent_data pdata = { .index = -1 };  in clk_hw_register_fixed_factor_parent_hw()
213 	const struct clk_parent_data pdata = { .index = -1 };  in clk_hw_register_fixed_factor()
224 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in clk_hw_register_fixed_factor_fwname()
236 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in clk_hw_register_fixed_factor_with_accuracy_fwname()
254 	return hw->clk;  in clk_register_fixed_factor()
286 	const struct clk_parent_data pdata = { .index = -1 };  in devm_clk_hw_register_fixed_factor()
297 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in devm_clk_hw_register_fixed_factor_fwname()
309 	const struct clk_parent_data pdata = { .index = -1, .fw_name = fw_name };  in devm_clk_hw_register_fixed_factor_with_accuracy_fwname()
321 	const char *clk_name = node->name;  in _of_fixed_factor_clk_setup()
326 	if (of_property_read_u32(node, "clock-div", &div)) {  in _of_fixed_factor_clk_setup()
327 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-div property\n",  in _of_fixed_factor_clk_setup()
329 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
332 	if (of_property_read_u32(node, "clock-mult", &mult)) {  in _of_fixed_factor_clk_setup()
333 		pr_err("%s Fixed factor clock <%pOFn> must have a clock-mult property\n",  in _of_fixed_factor_clk_setup()
335 		return ERR_PTR(-EIO);  in _of_fixed_factor_clk_setup()
338 	of_property_read_string(node, "clock-output-names", &clk_name);  in _of_fixed_factor_clk_setup()
361  * of_fixed_factor_clk_setup() - Setup function for simple fixed factor clock
368 CLK_OF_DECLARE(fixed_factor_clk, "fixed-factor-clock",
375 	of_clk_del_provider(pdev->dev.of_node);  in of_fixed_factor_clk_remove()
387 	clk = _of_fixed_factor_clk_setup(pdev->dev.of_node);  in of_fixed_factor_clk_probe()
397 	{ .compatible = "fixed-factor-clock" },