drivers/clk/clk-asm9260.c

1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>.
10 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/alphascale,asm9260.h>
217 	{ CLKID_AHB_RTC,	"rtc",		"ahb_div",
238 …k_parent_data __initdata clkout_mux_p[] = { { .index = 0, }, { .name = "pll" }, { .name = "rtc"} };
268 	clk_data->num = MAX_CLKS;  in asm9260_acc_init()
269 	hws = clk_data->hws;  in asm9260_acc_init()
271 	base = of_io_request_and_map(np, 0, np->name);  in asm9260_acc_init()
286 		clk_hw_register_mux_table_parent_data(NULL, mc->name, mc->parent_data,  in asm9260_acc_init()
287 				mc->num_parents, mc->flags, base + mc->offset,  in asm9260_acc_init()
288 				0, mc->mask, 0, mc->table, &asm9260_clk_lock);  in asm9260_acc_init()
295 		clk_hw_register_gate(NULL, gd->name,  in asm9260_acc_init()
296 			gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,  in asm9260_acc_init()
297 			base + gd->reg, gd->bit_idx, 0, &asm9260_clk_lock);  in asm9260_acc_init()
304 		hws[dc->idx] = clk_hw_register_divider(NULL, dc->name,  in asm9260_acc_init()
305 				dc->parent_name, CLK_SET_RATE_PARENT,  in asm9260_acc_init()
306 				base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,  in asm9260_acc_init()
314 		hws[gd->idx] = clk_hw_register_gate(NULL, gd->name,  in asm9260_acc_init()
315 				gd->parent_name, gd->flags, base + gd->reg,  in asm9260_acc_init()
316 				gd->bit_idx, 0, &asm9260_clk_lock);  in asm9260_acc_init()
329 	/* register clk-provider */  in asm9260_acc_init()
335 CLK_OF_DECLARE(asm9260_acc, "alphascale,asm9260-clock-controller",