Lines Matching +full:reg +full:- +full:init
1 // SPDX-License-Identifier: GPL-2.0
6 * Alexandre Belloni <alexandre.belloni@free-electrons.com>
8 #include <linux/clk-provider.h>
15 #include "berlin2-avpll.h"
19 * VCO with 8 channels each, channel 8 is the odd-one-out and does
34 /* BG2/BG2CDs VCO_B has an additional shift of 4 for its VCO_CTRL0 reg */
116 u32 reg; in berlin2_avpll_vco_is_enabled() local
118 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_is_enabled()
119 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_is_enabled()
120 reg >>= 4; in berlin2_avpll_vco_is_enabled()
122 return !!(reg & VCO_POWERUP); in berlin2_avpll_vco_is_enabled()
128 u32 reg; in berlin2_avpll_vco_enable() local
130 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
131 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_enable()
132 reg |= VCO_POWERUP << 4; in berlin2_avpll_vco_enable()
134 reg |= VCO_POWERUP; in berlin2_avpll_vco_enable()
135 writel_relaxed(reg, vco->base + VCO_CTRL0); in berlin2_avpll_vco_enable()
143 u32 reg; in berlin2_avpll_vco_disable() local
145 reg = readl_relaxed(vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable()
146 if (vco->flags & BERLIN2_AVPLL_BIT_QUIRK) in berlin2_avpll_vco_disable()
147 reg &= ~(VCO_POWERUP << 4); in berlin2_avpll_vco_disable()
149 reg &= ~VCO_POWERUP; in berlin2_avpll_vco_disable()
150 writel_relaxed(reg, vco->base + VCO_CTRL0); in berlin2_avpll_vco_disable()
159 u32 reg, refdiv, fbdiv; in berlin2_avpll_vco_recalc_rate() local
163 reg = readl_relaxed(vco->base + VCO_CTRL1); in berlin2_avpll_vco_recalc_rate()
164 refdiv = (reg & VCO_REFDIV_MASK) >> VCO_REFDIV_SHIFT; in berlin2_avpll_vco_recalc_rate()
166 fbdiv = (reg & VCO_FBDIV_MASK) >> VCO_FBDIV_SHIFT; in berlin2_avpll_vco_recalc_rate()
185 struct clk_init_data init; in berlin2_avpll_vco_register() local
189 return -ENOMEM; in berlin2_avpll_vco_register()
191 vco->base = base; in berlin2_avpll_vco_register()
192 vco->flags = vco_flags; in berlin2_avpll_vco_register()
193 vco->hw.init = &init; in berlin2_avpll_vco_register()
194 init.name = name; in berlin2_avpll_vco_register()
195 init.ops = &berlin2_avpll_vco_ops; in berlin2_avpll_vco_register()
196 init.parent_names = &parent_name; in berlin2_avpll_vco_register()
197 init.num_parents = 1; in berlin2_avpll_vco_register()
198 init.flags = flags; in berlin2_avpll_vco_register()
200 return clk_hw_register(NULL, &vco->hw); in berlin2_avpll_vco_register()
215 u32 reg; in berlin2_avpll_channel_is_enabled() local
217 if (ch->index == 7) in berlin2_avpll_channel_is_enabled()
220 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_is_enabled()
221 reg &= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_is_enabled()
223 return !!reg; in berlin2_avpll_channel_is_enabled()
229 u32 reg; in berlin2_avpll_channel_enable() local
231 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
232 reg |= VCO_POWERUP_CH1 << ch->index; in berlin2_avpll_channel_enable()
233 writel_relaxed(reg, ch->base + VCO_CTRL10); in berlin2_avpll_channel_enable()
241 u32 reg; in berlin2_avpll_channel_disable() local
243 reg = readl_relaxed(ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable()
244 reg &= ~(VCO_POWERUP_CH1 << ch->index); in berlin2_avpll_channel_disable()
245 writel_relaxed(reg, ch->base + VCO_CTRL10); in berlin2_avpll_channel_disable()
255 u32 reg, div_av2, div_av3, divider = 1; in berlin2_avpll_channel_recalc_rate() local
258 reg = readl_relaxed(ch->base + VCO_CTRL30); in berlin2_avpll_channel_recalc_rate()
259 if ((reg & (VCO_DPLL_CH1_ENABLE << ch->index)) == 0) in berlin2_avpll_channel_recalc_rate()
267 reg = readl_relaxed(ch->base + VCO_SYNC1n(ch->index)); in berlin2_avpll_channel_recalc_rate()
268 /* BG2/BG2CDs SYNC1 reg on AVPLL_B channel 1 is shifted by 4 */ in berlin2_avpll_channel_recalc_rate()
269 if (ch->flags & BERLIN2_AVPLL_BIT_QUIRK && ch->index == 0) in berlin2_avpll_channel_recalc_rate()
270 reg >>= 4; in berlin2_avpll_channel_recalc_rate()
271 divider = reg & VCO_SYNC1_MASK; in berlin2_avpll_channel_recalc_rate()
273 reg = readl_relaxed(ch->base + VCO_SYNC2n(ch->index)); in berlin2_avpll_channel_recalc_rate()
274 freq *= reg & VCO_SYNC2_MASK; in berlin2_avpll_channel_recalc_rate()
277 if (ch->index == 7) in berlin2_avpll_channel_recalc_rate()
284 reg = readl_relaxed(ch->base + VCO_CTRL11) >> 7; in berlin2_avpll_channel_recalc_rate()
285 reg = (reg >> (ch->index * 3)); in berlin2_avpll_channel_recalc_rate()
286 if (reg & BIT(2)) in berlin2_avpll_channel_recalc_rate()
287 divider *= div_hdmi[reg & 0x3]; in berlin2_avpll_channel_recalc_rate()
293 if (ch->index == 0) { in berlin2_avpll_channel_recalc_rate()
294 reg = readl_relaxed(ch->base + VCO_CTRL11); in berlin2_avpll_channel_recalc_rate()
295 reg >>= 28; in berlin2_avpll_channel_recalc_rate()
297 reg = readl_relaxed(ch->base + VCO_CTRL12); in berlin2_avpll_channel_recalc_rate()
298 reg >>= (ch->index-1) * 3; in berlin2_avpll_channel_recalc_rate()
300 if (reg & BIT(2)) in berlin2_avpll_channel_recalc_rate()
301 divider *= div_av1[reg & 0x3]; in berlin2_avpll_channel_recalc_rate()
307 if (ch->index < 2) { in berlin2_avpll_channel_recalc_rate()
308 reg = readl_relaxed(ch->base + VCO_CTRL12); in berlin2_avpll_channel_recalc_rate()
309 reg >>= 18 + (ch->index * 7); in berlin2_avpll_channel_recalc_rate()
310 } else if (ch->index < 7) { in berlin2_avpll_channel_recalc_rate()
311 reg = readl_relaxed(ch->base + VCO_CTRL13); in berlin2_avpll_channel_recalc_rate()
312 reg >>= (ch->index - 2) * 7; in berlin2_avpll_channel_recalc_rate()
314 reg = readl_relaxed(ch->base + VCO_CTRL14); in berlin2_avpll_channel_recalc_rate()
316 div_av2 = reg & 0x7f; in berlin2_avpll_channel_recalc_rate()
325 if (ch->index < 6) { in berlin2_avpll_channel_recalc_rate()
326 reg = readl_relaxed(ch->base + VCO_CTRL14); in berlin2_avpll_channel_recalc_rate()
327 reg >>= 7 + (ch->index * 4); in berlin2_avpll_channel_recalc_rate()
329 reg = readl_relaxed(ch->base + VCO_CTRL15); in berlin2_avpll_channel_recalc_rate()
331 div_av3 = reg & 0xf; in berlin2_avpll_channel_recalc_rate()
361 struct clk_init_data init; in berlin2_avpll_channel_register() local
365 return -ENOMEM; in berlin2_avpll_channel_register()
367 ch->base = base; in berlin2_avpll_channel_register()
369 ch->index = quirk_index[index]; in berlin2_avpll_channel_register()
371 ch->index = index; in berlin2_avpll_channel_register()
373 ch->flags = ch_flags; in berlin2_avpll_channel_register()
374 ch->hw.init = &init; in berlin2_avpll_channel_register()
375 init.name = name; in berlin2_avpll_channel_register()
376 init.ops = &berlin2_avpll_channel_ops; in berlin2_avpll_channel_register()
377 init.parent_names = &parent_name; in berlin2_avpll_channel_register()
378 init.num_parents = 1; in berlin2_avpll_channel_register()
379 init.flags = flags; in berlin2_avpll_channel_register()
381 return clk_hw_register(NULL, &ch->hw); in berlin2_avpll_channel_register()