1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
13 #include "clk-iproc.h"
15 #define IPROC_CLK_MAX_FREQ_POLICY                    0x3
16 #define IPROC_CLK_POLICY_FREQ_OFFSET                 0x008
18 #define IPROC_CLK_POLICY_FREQ_POLICY_FREQ_MASK       0x7
20 #define IPROC_CLK_PLLARMA_OFFSET                     0xc00
23 #define IPROC_CLK_PLLARMA_PDIV_MASK                  0xf
25 #define IPROC_CLK_PLLARMA_NDIV_INT_MASK              0x3ff
27 #define IPROC_CLK_PLLARMB_OFFSET                     0xc04
28 #define IPROC_CLK_PLLARMB_NDIV_FRAC_MASK             0xfffff
30 #define IPROC_CLK_PLLARMC_OFFSET                     0xc08
32 #define IPROC_CLK_PLLARMC_MDIV_MASK                  0xff
34 #define IPROC_CLK_PLLARMCTL5_OFFSET                  0xc20
35 #define IPROC_CLK_PLLARMCTL5_H_MDIV_MASK             0xff
37 #define IPROC_CLK_PLLARM_OFFSET_OFFSET               0xc24
40 #define IPROC_CLK_PLLARM_NDIV_INT_OFFSET_MASK        0xff
41 #define IPROC_CLK_PLLARM_NDIV_FRAC_OFFSET_MASK       0xfffff
43 #define IPROC_CLK_ARM_DIV_OFFSET                     0xe00
45 #define IPROC_CLK_ARM_DIV_ARM_PLL_SELECT_MASK        0xf
47 #define IPROC_CLK_POLICY_DBG_OFFSET                  0xec0
49 #define IPROC_CLK_POLICY_DBG_ACT_FREQ_MASK           0x7
52 	ARM_PLL_FID_CRYSTAL_CLK   = 0,
66 static unsigned int __get_fid(struct iproc_arm_pll *pll)  in __get_fid()  argument
71 	val = readl(pll->base + IPROC_CLK_ARM_DIV_OFFSET);  in __get_fid()
75 		policy = 0;  in __get_fid()
80 	val = readl(pll->base + IPROC_CLK_POLICY_FREQ_OFFSET);  in __get_fid()
84 	val = readl(pll->base + IPROC_CLK_POLICY_DBG_OFFSET);  in __get_fid()
88 		pr_debug("%s: fid override %u->%u\n", __func__,	fid,  in __get_fid()
101  *    - 25 MHz Crystal
102  *    - System clock
103  *    - PLL channel 0 (slow clock)
104  *    - PLL channel 1 (fast clock)
106 static int __get_mdiv(struct iproc_arm_pll *pll)  in __get_mdiv()  argument
112 	fid = __get_fid(pll);  in __get_mdiv()
121 		val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET);  in __get_mdiv()
123 		if (mdiv == 0)  in __get_mdiv()
128 		val = readl(pll->base +	IPROC_CLK_PLLARMCTL5_OFFSET);  in __get_mdiv()
130 		if (mdiv == 0)  in __get_mdiv()
135 		mdiv = -EFAULT;  in __get_mdiv()
141 static unsigned int __get_ndiv(struct iproc_arm_pll *pll)  in __get_ndiv()  argument
146 	val = readl(pll->base + IPROC_CLK_PLLARM_OFFSET_OFFSET);  in __get_ndiv()
154 		if (ndiv_int == 0)  in __get_ndiv()
160 		val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET);  in __get_ndiv()
163 		if (ndiv_int == 0)  in __get_ndiv()
166 		val = readl(pll->base + IPROC_CLK_PLLARMB_OFFSET);  in __get_ndiv()
176  * The output frequency of the ARM PLL is calculated based on the ARM PLL
178  *   pdiv = ARM PLL pre-divider
179  *   ndiv = ARM PLL multiplier
180  *   mdiv = ARM PLL post divider
188 	struct iproc_arm_pll *pll = to_iproc_arm_pll(hw);  in iproc_arm_pll_recalc_rate()  local
195 	val = readl(pll->base + IPROC_CLK_PLLARMC_OFFSET);  in iproc_arm_pll_recalc_rate()
197 		pll->rate = parent_rate;  in iproc_arm_pll_recalc_rate()
198 		return pll->rate;  in iproc_arm_pll_recalc_rate()
201 	/* PLL needs to be locked */  in iproc_arm_pll_recalc_rate()
202 	val = readl(pll->base + IPROC_CLK_PLLARMA_OFFSET);  in iproc_arm_pll_recalc_rate()
204 		pll->rate = 0;  in iproc_arm_pll_recalc_rate()
205 		return 0;  in iproc_arm_pll_recalc_rate()
210 	if (pdiv == 0)  in iproc_arm_pll_recalc_rate()
213 	ndiv = __get_ndiv(pll);  in iproc_arm_pll_recalc_rate()
214 	mdiv = __get_mdiv(pll);  in iproc_arm_pll_recalc_rate()
215 	if (mdiv <= 0) {  in iproc_arm_pll_recalc_rate()
216 		pll->rate = 0;  in iproc_arm_pll_recalc_rate()
217 		return 0;  in iproc_arm_pll_recalc_rate()
219 	pll->rate = (ndiv * parent_rate) >> 20;  in iproc_arm_pll_recalc_rate()
220 	pll->rate = (pll->rate / pdiv) / mdiv;  in iproc_arm_pll_recalc_rate()
222 	pr_debug("%s: ARM PLL rate: %lu. parent rate: %lu\n", __func__,  in iproc_arm_pll_recalc_rate()
223 		 pll->rate, parent_rate);  in iproc_arm_pll_recalc_rate()
227 	return pll->rate;  in iproc_arm_pll_recalc_rate()
237 	struct iproc_arm_pll *pll;  in iproc_armpll_setup()  local
241 	pll = kzalloc(sizeof(*pll), GFP_KERNEL);  in iproc_armpll_setup()
242 	if (WARN_ON(!pll))  in iproc_armpll_setup()
245 	pll->base = of_iomap(node, 0);  in iproc_armpll_setup()
246 	if (WARN_ON(!pll->base))  in iproc_armpll_setup()
249 	init.name = node->name;  in iproc_armpll_setup()
251 	init.flags = 0;  in iproc_armpll_setup()
252 	parent_name = of_clk_get_parent_name(node, 0);  in iproc_armpll_setup()
254 	init.num_parents = (parent_name ? 1 : 0);  in iproc_armpll_setup()
255 	pll->hw.init = &init;  in iproc_armpll_setup()
257 	ret = clk_hw_register(NULL, &pll->hw);  in iproc_armpll_setup()
261 	ret = of_clk_add_hw_provider(node, of_clk_hw_simple_get, &pll->hw);  in iproc_armpll_setup()
268 	clk_hw_unregister(&pll->hw);  in iproc_armpll_setup()
270 	iounmap(pll->base);  in iproc_armpll_setup()
272 	kfree(pll);  in iproc_armpll_setup()