Lines Matching +full:system +full:- +full:clock +full:- +full:fixed

1 # SPDX-License-Identifier: GPL-2.0-only
3 	bool "Baikal-T1 Clocks Control Unit interface"
7 	  Clocks Control Unit is the core of Baikal-T1 SoC System Controller
9 	  consists of multiple global clock domains, which can be reset by
12 	  configurable and fixed clock dividers. Enable this option to be able
13 	  to select Baikal-T1 CCU PLLs and Dividers drivers.
18 	bool "Baikal-T1 CCU PLLs support"
22 	  Enable this to support the PLLs embedded into the Baikal-T1 SoC
23 	  System Controller. These are five PLLs placed at the root of the
27 	  CPUs, DDR, etc.) or passed over the clock dividers to be only
28 	  then used as an individual reference clock of a target device.
31 	bool "Baikal-T1 CCU Dividers support"
36 	  between AXI-bus and system devices coming from CCU PLLs of Baikal-T1
37 	  SoC. CCU dividers can be either configurable or with fixed divider,
39 	  used to reset the domains they're supplying clock to.
42 	bool "Baikal-T1 CCU Resets support"
48 	  AXI-bus and some subsystems reset. These are mainly the
49 	  self-deasserted reset controls but there are several lines which
50 	  can be directly asserted/de-asserted (PCIe and DDR sub-domains).