clk/at91/sama7g5.c

5  * Copyright (C) 2020 Microchip Technology Inc. and its subsidiaries
142  * @c:		clock characteristics
154 	const struct clk_pll_characteristics *c;  member
167 			.c = &cpu_pll_characteristics,
180 			.c = &cpu_pll_characteristics,
198 			.c = &pll_characteristics,
212 			.c = &pll_characteristics,
228 			.c = &pll_characteristics,
241 			.c = &pll_characteristics,
253 			.c = &pll_characteristics,
262 			.c = &pll_characteristics,
274 			.c = &pll_characteristics,
282 			.c = &pll_characteristics,
294 			.c = &pll_characteristics,
303 			.c = &pll_characteristics,
314 			.c = &pll_characteristics,
327 			.c = &pll_characteristics,
336 			.c = &pll_characteristics,
359  * @c:			true if clock is critical and cannot be disabled
373 	u8 c;  member
379 	  .ep_mux_table = { 5, },
383 	  .c = 1, },
391 	  .c = 1, },
397 	  .ep_mux_table = { 5, 6, 7, },
399 	  .ep_chg_id = 5, },
404 	  .ep_mux_table = { 5, },
407 	  .c = 1, },
430 static u32 sama7g5_prog_mux_table[] = { 0, 1, 2, 5, 6, 7, 8, 9, 10, };
567 	  .pp_mux_table = { 5, 7, 9, },
591 	  .pp_mux_table = { 5, 8, },
599 	  .pp_mux_table = { 5, 8, },
607 	  .pp_mux_table = { 5, 8, },
615 	  .pp_mux_table = { 5, 8, },
623 	  .pp_mux_table = { 5, 8, },
631 	  .pp_mux_table = { 5, 8, },
639 	  .pp_mux_table = { 5, 8, },
647 	  .pp_mux_table = { 5, 8, },
655 	  .pp_mux_table = { 5, 8, },
663 	  .pp_mux_table = { 5, 8, },
671 	  .pp_mux_table = { 5, 8, },
679 	  .pp_mux_table = { 5, 8, },
719 	  .pp_mux_table = { 5, 9, },
727 	  .pp_mux_table = { 5, 9, },
735 	  .pp_mux_table = { 5, 8, },
743 	  .pp_mux_table = { 5, 8, },
751 	  .pp_mux_table = { 5, 8, },
759 	  .pp_mux_table = { 5, 8, },
767 	  .pp_mux_table = { 5, 8, },
775 	  .pp_mux_table = { 5, 8, },
783 	  .pp_mux_table = { 5, 9, },
791 	  .pp_mux_table = { 5, 9, },
801 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
802 	  .pp_count = 5,
811 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
812 	  .pp_count = 5,
821 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
822 	  .pp_count = 5,
831 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
832 	  .pp_count = 5,
841 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
842 	  .pp_count = 5,
851 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
852 	  .pp_count = 5,
859 	  .pp_mux_table = { 5, 8, },
867 	  .pp_mux_table = { 5, 8, },
875 	  .pp_mux_table = { 5, 8, },
883 	  .pp_mux_table = { 5, 8, },
891 	  .pp_mux_table = { 5, 8, },
899 	  .pp_mux_table = { 5, 9, },
907 	  .pp_mux_table = { 5, 9, },
917 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
918 	  .pp_count = 5,
927 	  .pp_mux_table = { 5, 7, 8, 9, 10, },
928 	  .pp_count = 5,
945 	.divisors = { 1, 2, 4, 3, 5 },
1058 					sama7g5_plls[i][j].c,  in sama7g5_pmc_setup()
1067 					sama7g5_plls[i][j].c,  in sama7g5_pmc_setup()
1089 					  &pmc_mck0_lock, CLK_GET_RATE_NOCACHE, 5);  in sama7g5_pmc_setup()
1123 				   sama7g5_mckx[i].c,  in sama7g5_pmc_setup()
1146 	parent_hws[5] = sama7g5_plls[PLL_ID_IMG][PLL_COMPID_DIV0].hw;  in sama7g5_pmc_setup()