Lines Matching full:layout
20 #define PLL_MUL(reg, layout) (((reg) >> (layout)->mul_shift) & \ argument
21 (layout)->mul_mask)
23 #define PLL_MUL_MASK(layout) ((layout)->mul_mask) argument
24 #define PLL_MUL_MAX(layout) (PLL_MUL_MASK(layout) + 1) argument
41 const struct clk_pll_layout *layout; member
59 const struct clk_pll_layout *layout = pll->layout; in clk_pll_prepare() local
73 mul = PLL_MUL(pllr, layout); in clk_pll_prepare()
87 regmap_update_bits(regmap, offset, layout->pllr_mask, in clk_pll_prepare()
90 ((pll->mul & layout->mul_mask) << layout->mul_shift)); in clk_pll_prepare()
108 unsigned int mask = pll->layout->pllr_mask; in clk_pll_unprepare()
128 const struct clk_pll_layout *layout = pll->layout; in clk_pll_get_best_div_mul() local
163 * layout (limited by the MUL or DIV field size). in clk_pll_get_best_div_mul()
165 maxdiv = DIV_ROUND_UP(parent_rate * PLL_MUL_MAX(layout), rate); in clk_pll_get_best_div_mul()
289 (PLL_MUL(pllr, pll->layout) + 1); in clk_pll_restore_context()
314 const struct clk_pll_layout *layout, in at91_clk_register_pll() argument
339 pll->layout = layout; in at91_clk_register_pll()
344 pll->mul = PLL_MUL(pllr, layout); in at91_clk_register_pll()