39 	const struct clk_pcr_layout *layout;  member
173 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_set()
174 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_set()
175 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_set()
176 			   periph->layout->div_mask | periph->layout->cmd |  in clk_sam9x5_peripheral_set()
178 			   field_prep(periph->layout->div_mask, periph->div) |  in clk_sam9x5_peripheral_set()
179 			   periph->layout->cmd | enable);  in clk_sam9x5_peripheral_set()
201 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
202 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_disable()
203 	regmap_update_bits(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_disable()
204 			   AT91_PMC_PCR_EN | periph->layout->cmd,  in clk_sam9x5_peripheral_disable()
205 			   periph->layout->cmd);  in clk_sam9x5_peripheral_disable()
219 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_is_enabled()
220 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_is_enabled()
221 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_is_enabled()
239 	regmap_write(periph->regmap, periph->layout->offset,  in clk_sam9x5_peripheral_recalc_rate()
240 		     (periph->id & periph->layout->pid_mask));  in clk_sam9x5_peripheral_recalc_rate()
241 	regmap_read(periph->regmap, periph->layout->offset, &status);  in clk_sam9x5_peripheral_recalc_rate()
245 		periph->div = field_get(periph->layout->div_mask, status);  in clk_sam9x5_peripheral_recalc_rate()
449 				    const struct clk_pcr_layout *layout,  in at91_clk_register_sam9x5_peripheral()  argument
487 	if (layout->div_mask)  in at91_clk_register_sam9x5_peripheral()
489 	periph->layout = layout;  in at91_clk_register_sam9x5_peripheral()