189 				      unsigned long parent_rate)  in __wrpll_update_parent_rate()  argument
193 	if (parent_rate > MAX_INPUT_FREQ || parent_rate < MIN_POST_DIVR_FREQ)  in __wrpll_update_parent_rate()
196 	c->parent_rate = parent_rate;  in __wrpll_update_parent_rate()
197 	max_r_for_parent = div_u64(parent_rate, MIN_POST_DIVR_FREQ);  in __wrpll_update_parent_rate()
200 	c->init_r = DIV_ROUND_UP_ULL(parent_rate, MAX_POST_DIVR_FREQ);  in __wrpll_update_parent_rate()
227 			     unsigned long parent_rate)  in wrpll_configure_for_rate()  argument
241 	if (parent_rate != c->parent_rate) {  in wrpll_configure_for_rate()
242 		if (__wrpll_update_parent_rate(c, parent_rate)) {  in wrpll_configure_for_rate()
252 	if (target_rate == parent_rate) {  in wrpll_configure_for_rate()
266 	ratio = div64_u64((target_vco_rate << ROUND_SHIFT), parent_rate);  in wrpll_configure_for_rate()
282 		post_divr_freq = div_u64(parent_rate, r);  in wrpll_configure_for_rate()
306 	post_divr_freq = div_u64(parent_rate, best_r);  in wrpll_configure_for_rate()
337 				     unsigned long parent_rate)  in wrpll_calc_output_rate()  argument
348 	n = parent_rate * fbdiv * (c->divf + 1);  in wrpll_calc_output_rate()