drivers/cache/ax45mp_cache.c

1 // SPDX-License-Identifier: GPL-2.0
3  * non-coherent cache functions for Andes AX45MP
10 #include <linux/dma-direction.h>
14 #include <asm/dma-noncoherent.h>
23 /* D-cache operation */
25 #define AX45MP_CCTL_L1D_VA_WB			1 /* Write-back an L1 cache entry */
35 #define AX45MP_CCTL_L2_PA_WB			0x9 /* Write-back an L2 cache entry */
89 /* Write-back L1 and L2 cache entry */
115 	start = start & (~(line_size - 1));  in ax45mp_dma_cache_inv()
116 	end = ((end + line_size - 1) & (~(line_size - 1)));  in ax45mp_dma_cache_inv()
136 	start = start & (~(line_size - 1));  in ax45mp_dma_cache_wback()
137 	end = ((end + line_size - 1) & (~(line_size - 1)));  in ax45mp_dma_cache_wback()
153 	ret = of_property_read_u32(np, "cache-line-size", &ax45mp_priv.ax45mp_cache_line_size);  in ax45mp_get_l2_line_size()
155 		pr_err("Failed to get cache-line-size, defaulting to 64 bytes\n");  in ax45mp_get_l2_line_size()
160 		pr_err("Expected cache-line-size to be 64 bytes (found:%u)\n",  in ax45mp_get_l2_line_size()
162 		return -EINVAL;  in ax45mp_get_l2_line_size()
175 	{ .compatible = "andestech,ax45mp-cache" },
187 		return -ENODEV;  in ax45mp_cache_init()
205 		return -ENOMEM;  in ax45mp_cache_init()