53 #define RSB_CTRL	0x0	/* Global control */
54 #define RSB_CCR		0x4	/* Clock control */
55 #define RSB_INTE	0x8	/* Interrupt controls */
56 #define RSB_INTS	0xc	/* Interrupt status */
57 #define RSB_ADDR	0x10	/* Address to send with read/write command */
58 #define RSB_DATA	0x1c	/* Data to read/write */
59 #define RSB_LCR		0x24	/* Line control */
60 #define RSB_DMCR	0x28	/* Device mode (init) control */
61 #define RSB_CMD		0x2c	/* RSB Command */
62 #define RSB_DAR		0x30	/* Device address / runtime address */
68 #define RSB_CTRL_SOFT_RST		BIT(0)
71 #define RSB_CCR_SDA_OUT_DELAY(v)	(((v) & 0x7) << 8)
72 #define RSB_CCR_MAX_CLK_DIV		0xff
77 #define RSB_INTS_TRANS_ERR_DATA_BIT(v)	(((v) >> 8) & 0xf)
81 #define RSB_INTS_TRANS_OVER		BIT(0)
89 #define RSB_LCR_SDA_CTL_EN		BIT(0)
93 #define RSB_DMCR_MODE_DATA		(0x7c << 16)
94 #define RSB_DMCR_MODE_REG		(0x3e << 8)
95 #define RSB_DMCR_DEV_ADDR		0x00
98 #define RSB_CMD_RD8			0x8b
99 #define RSB_CMD_RD16			0x9c
100 #define RSB_CMD_RD32			0xa6
101 #define RSB_CMD_WR8			0x4e
102 #define RSB_CMD_WR16			0x59
103 #define RSB_CMD_WR32			0x63
104 #define RSB_CMD_STRA			0xe8
107 #define RSB_DAR_RTA(v)			(((v) & 0xff) << 16)
108 #define RSB_DAR_DA(v)			((v) & 0xffff)
151 			irq = of_irq_get(dev->of_node, 0);  in sunxi_rsb_device_probe()
155 		if (irq < 0)  in sunxi_rsb_device_probe()
156 			irq = 0;  in sunxi_rsb_device_probe()
162 	if (ret < 0)  in sunxi_rsb_device_probe()
223 	if (err < 0) {  in sunxi_rsb_device_create()
255 	return 0;  in sunxi_rsb_remove_devices()
330 	return 0;  in _sunxi_rsb_run_xfer()
371 	*buf = readl(rsb->regs + RSB_DATA) & GENMASK(len * 8 - 1, 0);  in sunxi_rsb_read()
438 	if (reg > 0xff)  in regmap_sunxi_rsb_reg_read()
528 	int ret = 0;  in sunxi_rsb_init_device_mode()
550  * 0x17, 0x2d, 0x3a, 0x4e, 0x59, 0x63, 0x74, 0x8b,
551  * 0x9c, 0xa6, 0xb1, 0xc5, 0xd2, 0xe8, 0xff
555  * use 0x2d for the primary PMIC, 0x3a for the secondary PMIC if
556  * there is one, and 0x45 for peripheral ICs.
564 	{ 0x3a3, 0x2d }, /* Primary PMIC: AXP223, AXP809, AXP81X, ... */
565 	{ 0x745, 0x3a }, /* Secondary PMIC: AXP806, ... */
566 	{ 0xe89, 0x4e }, /* Peripheral IC: AC100, ... */
573 	for (i = 0; i < ARRAY_SIZE(sunxi_rsb_addr_maps); i++)  in sunxi_rsb_get_rtaddr()
577 	return 0; /* 0 is an invalid runtime address */  in sunxi_rsb_get_rtaddr()
647 	return 0;  in of_rsb_register_devices()
696 	return 0;  in sunxi_rsb_hw_init()
719 	return 0;  in sunxi_rsb_runtime_suspend()
735 	return 0;  in sunxi_rsb_suspend()
766 	rsb->regs = devm_platform_ioremap_resource(pdev, 0);  in sunxi_rsb_probe()
770 	irq = platform_get_irq(pdev, 0);  in sunxi_rsb_probe()
771 	if (irq < 0)  in sunxi_rsb_probe()
787 	ret = devm_request_irq(dev, irq, sunxi_rsb_irq, 0, RSB_CTRL_NAME, rsb);  in sunxi_rsb_probe()
809 	return 0;  in sunxi_rsb_probe()
859 	return 0;  in sunxi_rsb_init()