1 // SPDX-License-Identifier: GPL-2.0-only
3  * Copyright (C) 2023, STMicroelectronics - All Rights Reserved
69 /* Compartiment IDs */
81 	void __iomem *addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id;  in stm32_rif_acquire_semaphore()
88 		return -EACCES;  in stm32_rif_acquire_semaphore()
96 	void __iomem *addr = stm32_firewall_controller->mmio + RIFSC_RISC_PER0_SEMCR + 0x8 * id;  in stm32_rif_release_semaphore()
108 static int stm32_rifsc_grant_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)  in stm32_rifsc_grant_access()  argument
110 	struct stm32_firewall_controller *rifsc_controller = ctrl;  in stm32_rifsc_grant_access()
114 	if (firewall_id >= rifsc_controller->max_entries) {  in stm32_rifsc_grant_access()
115 		dev_err(rifsc_controller->dev, "Invalid sys bus ID %u", firewall_id);  in stm32_rifsc_grant_access()
116 		return -EINVAL;  in stm32_rifsc_grant_access()
126 	sec_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_SECCFGR0 + 0x4 * reg_id);  in stm32_rifsc_grant_access()
127 	cid_reg_value = readl(rifsc_controller->mmio + RIFSC_RISC_PER0_CIDCFGR + 0x8 * firewall_id);  in stm32_rifsc_grant_access()
135 			dev_dbg(rifsc_controller->dev,  in stm32_rifsc_grant_access()
137 			return -EACCES;  in stm32_rifsc_grant_access()
151 		dev_dbg(rifsc_controller->dev, "Invalid CID configuration for peripheral: %d\n",  in stm32_rifsc_grant_access()
153 		return -EACCES;  in stm32_rifsc_grant_access()
159 		dev_dbg(rifsc_controller->dev,  in stm32_rifsc_grant_access()
161 		return -EACCES;  in stm32_rifsc_grant_access()
171 			dev_err(rifsc_controller->dev,  in stm32_rifsc_grant_access()
180 static void stm32_rifsc_release_access(struct stm32_firewall_controller *ctrl, u32 firewall_id)  in stm32_rifsc_release_access()  argument
182 	stm32_rif_release_semaphore(ctrl, firewall_id);  in stm32_rifsc_release_access()
188 	struct device_node *np = pdev->dev.of_node;  in stm32_rifsc_probe()
194 	rifsc_controller = devm_kzalloc(&pdev->dev, sizeof(*rifsc_controller), GFP_KERNEL);  in stm32_rifsc_probe()
196 		return -ENOMEM;  in stm32_rifsc_probe()
202 	rifsc_controller->dev = &pdev->dev;  in stm32_rifsc_probe()
203 	rifsc_controller->mmio = mmio;  in stm32_rifsc_probe()
204 	rifsc_controller->name = dev_driver_string(rifsc_controller->dev);  in stm32_rifsc_probe()
205 	rifsc_controller->type = STM32_PERIPHERAL_FIREWALL | STM32_MEMORY_FIREWALL;  in stm32_rifsc_probe()
206 	rifsc_controller->grant_access = stm32_rifsc_grant_access;  in stm32_rifsc_probe()
207 	rifsc_controller->release_access = stm32_rifsc_release_access;  in stm32_rifsc_probe()
210 	nb_risup = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF1_MASK;  in stm32_rifsc_probe()
211 	nb_rimu = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF2_MASK;  in stm32_rifsc_probe()
212 	nb_risal = readl(rifsc_controller->mmio + RIFSC_RISC_HWCFGR2) & HWCFGR2_CONF3_MASK;  in stm32_rifsc_probe()
213 	rifsc_controller->max_entries = nb_risup + nb_rimu + nb_risal;  in stm32_rifsc_probe()
219 		dev_err(rifsc_controller->dev, "Couldn't register as a firewall controller: %d",  in stm32_rifsc_probe()
226 		dev_err(rifsc_controller->dev, "Couldn't populate RIFSC bus: %d",  in stm32_rifsc_probe()
232 	return of_platform_populate(np, NULL, NULL, &pdev->dev);  in stm32_rifsc_probe()
236 	{ .compatible = "st,stm32mp25-rifsc" },
244 		.name = "stm32-rifsc",