Lines Matching refs:mhi_cntrl
86 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in serial_number_show() local
89 mhi_cntrl->serial_number); in serial_number_show()
98 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in oem_pk_hash_show() local
103 ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_OEMPKHASH(i), &hash_segment[i]); in oem_pk_hash_show()
123 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in soc_reset_store() local
125 mhi_soc_reset(mhi_cntrl); in soc_reset_store()
135 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in trigger_edl_store() local
146 ret = mhi_cntrl->edl_trigger(mhi_cntrl); in trigger_edl_store()
163 static int mhi_alloc_aligned_ring(struct mhi_controller *mhi_cntrl, in mhi_alloc_aligned_ring() argument
168 ring->pre_aligned = dma_alloc_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, in mhi_alloc_aligned_ring()
179 void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl) in mhi_deinit_free_irq() argument
182 struct mhi_event *mhi_event = mhi_cntrl->mhi_event; in mhi_deinit_free_irq()
184 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) { in mhi_deinit_free_irq()
188 free_irq(mhi_cntrl->irq[mhi_event->irq], mhi_event); in mhi_deinit_free_irq()
191 free_irq(mhi_cntrl->irq[0], mhi_cntrl); in mhi_deinit_free_irq()
194 int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl) in mhi_init_irq_setup() argument
196 struct mhi_event *mhi_event = mhi_cntrl->mhi_event; in mhi_init_irq_setup()
197 struct device *dev = &mhi_cntrl->mhi_dev->dev; in mhi_init_irq_setup()
202 if (mhi_cntrl->irq_flags) in mhi_init_irq_setup()
203 irq_flags = mhi_cntrl->irq_flags; in mhi_init_irq_setup()
206 ret = request_threaded_irq(mhi_cntrl->irq[0], mhi_intvec_handler, in mhi_init_irq_setup()
209 "bhi", mhi_cntrl); in mhi_init_irq_setup()
217 disable_irq(mhi_cntrl->irq[0]); in mhi_init_irq_setup()
219 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) { in mhi_init_irq_setup()
223 if (mhi_event->irq >= mhi_cntrl->nr_irqs) { in mhi_init_irq_setup()
230 ret = request_irq(mhi_cntrl->irq[mhi_event->irq], in mhi_init_irq_setup()
236 mhi_cntrl->irq[mhi_event->irq], i); in mhi_init_irq_setup()
240 disable_irq(mhi_cntrl->irq[mhi_event->irq]); in mhi_init_irq_setup()
250 free_irq(mhi_cntrl->irq[mhi_event->irq], mhi_event); in mhi_init_irq_setup()
252 free_irq(mhi_cntrl->irq[0], mhi_cntrl); in mhi_init_irq_setup()
257 void mhi_deinit_dev_ctxt(struct mhi_controller *mhi_cntrl) in mhi_deinit_dev_ctxt() argument
260 struct mhi_ctxt *mhi_ctxt = mhi_cntrl->mhi_ctxt; in mhi_deinit_dev_ctxt()
265 mhi_cmd = mhi_cntrl->mhi_cmd; in mhi_deinit_dev_ctxt()
268 dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, in mhi_deinit_dev_ctxt()
274 dma_free_coherent(mhi_cntrl->cntrl_dev, in mhi_deinit_dev_ctxt()
278 mhi_event = mhi_cntrl->mhi_event; in mhi_deinit_dev_ctxt()
279 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) { in mhi_deinit_dev_ctxt()
284 dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, in mhi_deinit_dev_ctxt()
290 dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->er_ctxt) * in mhi_deinit_dev_ctxt()
291 mhi_cntrl->total_ev_rings, mhi_ctxt->er_ctxt, in mhi_deinit_dev_ctxt()
294 dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->chan_ctxt) * in mhi_deinit_dev_ctxt()
295 mhi_cntrl->max_chan, mhi_ctxt->chan_ctxt, in mhi_deinit_dev_ctxt()
299 mhi_cntrl->mhi_ctxt = NULL; in mhi_deinit_dev_ctxt()
302 int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) in mhi_init_dev_ctxt() argument
314 atomic_set(&mhi_cntrl->dev_wake, 0); in mhi_init_dev_ctxt()
315 atomic_set(&mhi_cntrl->pending_pkts, 0); in mhi_init_dev_ctxt()
322 mhi_ctxt->chan_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, in mhi_init_dev_ctxt()
324 mhi_cntrl->max_chan, in mhi_init_dev_ctxt()
330 mhi_chan = mhi_cntrl->mhi_chan; in mhi_init_dev_ctxt()
332 for (i = 0; i < mhi_cntrl->max_chan; i++, chan_ctxt++, mhi_chan++) { in mhi_init_dev_ctxt()
354 mhi_ctxt->er_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, in mhi_init_dev_ctxt()
356 mhi_cntrl->total_ev_rings, in mhi_init_dev_ctxt()
363 mhi_event = mhi_cntrl->mhi_event; in mhi_init_dev_ctxt()
364 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, er_ctxt++, in mhi_init_dev_ctxt()
384 ret = mhi_alloc_aligned_ring(mhi_cntrl, ring, ring->len); in mhi_init_dev_ctxt()
401 mhi_ctxt->cmd_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, in mhi_init_dev_ctxt()
409 mhi_cmd = mhi_cntrl->mhi_cmd; in mhi_init_dev_ctxt()
417 ret = mhi_alloc_aligned_ring(mhi_cntrl, ring, ring->len); in mhi_init_dev_ctxt()
428 mhi_cntrl->mhi_ctxt = mhi_ctxt; in mhi_init_dev_ctxt()
436 dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, in mhi_init_dev_ctxt()
439 dma_free_coherent(mhi_cntrl->cntrl_dev, in mhi_init_dev_ctxt()
442 i = mhi_cntrl->total_ev_rings; in mhi_init_dev_ctxt()
443 mhi_event = mhi_cntrl->mhi_event + i; in mhi_init_dev_ctxt()
452 dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, in mhi_init_dev_ctxt()
455 dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->er_ctxt) * in mhi_init_dev_ctxt()
456 mhi_cntrl->total_ev_rings, mhi_ctxt->er_ctxt, in mhi_init_dev_ctxt()
460 dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->chan_ctxt) * in mhi_init_dev_ctxt()
461 mhi_cntrl->max_chan, mhi_ctxt->chan_ctxt, in mhi_init_dev_ctxt()
470 int mhi_init_mmio(struct mhi_controller *mhi_cntrl) in mhi_init_mmio() argument
476 void __iomem *base = mhi_cntrl->regs; in mhi_init_mmio()
477 struct device *dev = &mhi_cntrl->mhi_dev->dev; in mhi_init_mmio()
484 upper_32_bits(mhi_cntrl->mhi_ctxt->chan_ctxt_addr), in mhi_init_mmio()
488 lower_32_bits(mhi_cntrl->mhi_ctxt->chan_ctxt_addr), in mhi_init_mmio()
492 upper_32_bits(mhi_cntrl->mhi_ctxt->er_ctxt_addr), in mhi_init_mmio()
496 lower_32_bits(mhi_cntrl->mhi_ctxt->er_ctxt_addr), in mhi_init_mmio()
500 upper_32_bits(mhi_cntrl->mhi_ctxt->cmd_ctxt_addr), in mhi_init_mmio()
504 lower_32_bits(mhi_cntrl->mhi_ctxt->cmd_ctxt_addr), in mhi_init_mmio()
508 upper_32_bits(mhi_cntrl->iova_start), in mhi_init_mmio()
512 lower_32_bits(mhi_cntrl->iova_start), in mhi_init_mmio()
516 upper_32_bits(mhi_cntrl->iova_start), in mhi_init_mmio()
520 lower_32_bits(mhi_cntrl->iova_start), in mhi_init_mmio()
524 upper_32_bits(mhi_cntrl->iova_stop), in mhi_init_mmio()
528 lower_32_bits(mhi_cntrl->iova_stop), in mhi_init_mmio()
532 upper_32_bits(mhi_cntrl->iova_stop), in mhi_init_mmio()
536 lower_32_bits(mhi_cntrl->iova_stop), in mhi_init_mmio()
544 ret = mhi_get_channel_doorbell_offset(mhi_cntrl, &val); in mhi_init_mmio()
548 if (val >= mhi_cntrl->reg_len - (8 * MHI_DEV_WAKE_DB)) { in mhi_init_mmio()
550 val, mhi_cntrl->reg_len - (8 * MHI_DEV_WAKE_DB)); in mhi_init_mmio()
555 mhi_cntrl->wake_db = base + val + (8 * MHI_DEV_WAKE_DB); in mhi_init_mmio()
556 mhi_cntrl->wake_set = false; in mhi_init_mmio()
559 mhi_chan = mhi_cntrl->mhi_chan; in mhi_init_mmio()
560 for (i = 0; i < mhi_cntrl->max_chan; i++, val += 8, mhi_chan++) in mhi_init_mmio()
564 ret = mhi_read_reg(mhi_cntrl, base, ERDBOFF, &val); in mhi_init_mmio()
570 if (val >= mhi_cntrl->reg_len - (8 * mhi_cntrl->total_ev_rings)) { in mhi_init_mmio()
572 val, mhi_cntrl->reg_len - (8 * mhi_cntrl->total_ev_rings)); in mhi_init_mmio()
577 mhi_event = mhi_cntrl->mhi_event; in mhi_init_mmio()
578 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, val += 8, mhi_event++) { in mhi_init_mmio()
586 mhi_cntrl->mhi_cmd[PRIMARY_CMD_RING].ring.db_addr = base + CRDB_LOWER; in mhi_init_mmio()
590 mhi_write_reg(mhi_cntrl, base, reg_info[i].offset, in mhi_init_mmio()
593 ret = mhi_write_reg_field(mhi_cntrl, base, MHICFG, MHICFG_NER_MASK, in mhi_init_mmio()
594 mhi_cntrl->total_ev_rings); in mhi_init_mmio()
600 ret = mhi_write_reg_field(mhi_cntrl, base, MHICFG, MHICFG_NHWER_MASK, in mhi_init_mmio()
601 mhi_cntrl->hw_ev_rings); in mhi_init_mmio()
610 void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, in mhi_deinit_chan_ctxt() argument
620 chan_ctxt = &mhi_cntrl->mhi_ctxt->chan_ctxt[mhi_chan->chan]; in mhi_deinit_chan_ctxt()
625 dma_free_coherent(mhi_cntrl->cntrl_dev, tre_ring->alloc_size, in mhi_deinit_chan_ctxt()
645 int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl, in mhi_init_chan_ctxt() argument
658 chan_ctxt = &mhi_cntrl->mhi_ctxt->chan_ctxt[mhi_chan->chan]; in mhi_init_chan_ctxt()
659 ret = mhi_alloc_aligned_ring(mhi_cntrl, tre_ring, tre_ring->len); in mhi_init_chan_ctxt()
668 dma_free_coherent(mhi_cntrl->cntrl_dev, tre_ring->alloc_size, in mhi_init_chan_ctxt()
693 static int parse_ev_cfg(struct mhi_controller *mhi_cntrl, in parse_ev_cfg() argument
698 struct device *dev = mhi_cntrl->cntrl_dev; in parse_ev_cfg()
702 mhi_cntrl->total_ev_rings = num; in parse_ev_cfg()
703 mhi_cntrl->mhi_event = kcalloc(num, sizeof(*mhi_cntrl->mhi_event), in parse_ev_cfg()
705 if (!mhi_cntrl->mhi_event) in parse_ev_cfg()
709 mhi_event = mhi_cntrl->mhi_event; in parse_ev_cfg()
721 if (mhi_event->chan >= mhi_cntrl->max_chan) { in parse_ev_cfg()
728 &mhi_cntrl->mhi_chan[mhi_event->chan]; in parse_ev_cfg()
759 mhi_cntrl->hw_ev_rings++; in parse_ev_cfg()
761 mhi_cntrl->sw_ev_rings++; in parse_ev_cfg()
772 kfree(mhi_cntrl->mhi_event); in parse_ev_cfg()
776 static int parse_ch_cfg(struct mhi_controller *mhi_cntrl, in parse_ch_cfg() argument
780 struct device *dev = mhi_cntrl->cntrl_dev; in parse_ch_cfg()
784 mhi_cntrl->max_chan = config->max_channels; in parse_ch_cfg()
791 mhi_cntrl->mhi_chan = vcalloc(mhi_cntrl->max_chan, in parse_ch_cfg()
792 sizeof(*mhi_cntrl->mhi_chan)); in parse_ch_cfg()
793 if (!mhi_cntrl->mhi_chan) in parse_ch_cfg()
796 INIT_LIST_HEAD(&mhi_cntrl->lpm_chans); in parse_ch_cfg()
805 if (chan >= mhi_cntrl->max_chan) { in parse_ch_cfg()
810 mhi_chan = &mhi_cntrl->mhi_chan[chan]; in parse_ch_cfg()
883 list_add_tail(&mhi_chan->node, &mhi_cntrl->lpm_chans); in parse_ch_cfg()
889 vfree(mhi_cntrl->mhi_chan); in parse_ch_cfg()
894 static int parse_config(struct mhi_controller *mhi_cntrl, in parse_config() argument
900 ret = parse_ch_cfg(mhi_cntrl, config); in parse_config()
905 ret = parse_ev_cfg(mhi_cntrl, config); in parse_config()
909 mhi_cntrl->timeout_ms = config->timeout_ms; in parse_config()
910 if (!mhi_cntrl->timeout_ms) in parse_config()
911 mhi_cntrl->timeout_ms = MHI_TIMEOUT_MS; in parse_config()
913 mhi_cntrl->ready_timeout_ms = config->ready_timeout_ms; in parse_config()
914 mhi_cntrl->bounce_buf = config->use_bounce_buf; in parse_config()
915 mhi_cntrl->buffer_len = config->buf_len; in parse_config()
916 if (!mhi_cntrl->buffer_len) in parse_config()
917 mhi_cntrl->buffer_len = MHI_MAX_MTU; in parse_config()
920 mhi_cntrl->db_access = MHI_PM_M0 | MHI_PM_M2; in parse_config()
922 mhi_cntrl->db_access &= ~MHI_PM_M2; in parse_config()
927 vfree(mhi_cntrl->mhi_chan); in parse_config()
932 int mhi_register_controller(struct mhi_controller *mhi_cntrl, in mhi_register_controller() argument
941 if (!mhi_cntrl || !mhi_cntrl->cntrl_dev || !mhi_cntrl->regs || in mhi_register_controller()
942 !mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put || in mhi_register_controller()
943 !mhi_cntrl->status_cb || !mhi_cntrl->read_reg || in mhi_register_controller()
944 !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs || in mhi_register_controller()
945 !mhi_cntrl->irq || !mhi_cntrl->reg_len) in mhi_register_controller()
948 ret = parse_config(mhi_cntrl, config); in mhi_register_controller()
952 mhi_cntrl->mhi_cmd = kcalloc(NR_OF_CMD_RINGS, in mhi_register_controller()
953 sizeof(*mhi_cntrl->mhi_cmd), GFP_KERNEL); in mhi_register_controller()
954 if (!mhi_cntrl->mhi_cmd) { in mhi_register_controller()
959 INIT_LIST_HEAD(&mhi_cntrl->transition_list); in mhi_register_controller()
960 mutex_init(&mhi_cntrl->pm_mutex); in mhi_register_controller()
961 rwlock_init(&mhi_cntrl->pm_lock); in mhi_register_controller()
962 spin_lock_init(&mhi_cntrl->transition_lock); in mhi_register_controller()
963 spin_lock_init(&mhi_cntrl->wlock); in mhi_register_controller()
964 INIT_WORK(&mhi_cntrl->st_worker, mhi_pm_st_worker); in mhi_register_controller()
965 init_waitqueue_head(&mhi_cntrl->state_event); in mhi_register_controller()
967 mhi_cntrl->hiprio_wq = alloc_ordered_workqueue("mhi_hiprio_wq", WQ_HIGHPRI); in mhi_register_controller()
968 if (!mhi_cntrl->hiprio_wq) { in mhi_register_controller()
969 dev_err(mhi_cntrl->cntrl_dev, "Failed to allocate workqueue\n"); in mhi_register_controller()
974 mhi_cmd = mhi_cntrl->mhi_cmd; in mhi_register_controller()
978 mhi_event = mhi_cntrl->mhi_event; in mhi_register_controller()
979 for (i = 0; i < mhi_cntrl->total_ev_rings; i++, mhi_event++) { in mhi_register_controller()
984 mhi_event->mhi_cntrl = mhi_cntrl; in mhi_register_controller()
994 mhi_chan = mhi_cntrl->mhi_chan; in mhi_register_controller()
995 for (i = 0; i < mhi_cntrl->max_chan; i++, mhi_chan++) { in mhi_register_controller()
1001 mhi_event = &mhi_cntrl->mhi_event[mhi_chan->er_index]; in mhi_register_controller()
1005 if (mhi_cntrl->bounce_buf) { in mhi_register_controller()
1006 mhi_cntrl->map_single = mhi_map_single_use_bb; in mhi_register_controller()
1007 mhi_cntrl->unmap_single = mhi_unmap_single_use_bb; in mhi_register_controller()
1009 mhi_cntrl->map_single = mhi_map_single_no_bb; in mhi_register_controller()
1010 mhi_cntrl->unmap_single = mhi_unmap_single_no_bb; in mhi_register_controller()
1013 mhi_cntrl->index = ida_alloc(&mhi_controller_ida, GFP_KERNEL); in mhi_register_controller()
1014 if (mhi_cntrl->index < 0) { in mhi_register_controller()
1015 ret = mhi_cntrl->index; in mhi_register_controller()
1019 ret = mhi_init_irq_setup(mhi_cntrl); in mhi_register_controller()
1024 mhi_dev = mhi_alloc_device(mhi_cntrl); in mhi_register_controller()
1026 dev_err(mhi_cntrl->cntrl_dev, "Failed to allocate MHI device\n"); in mhi_register_controller()
1032 mhi_dev->mhi_cntrl = mhi_cntrl; in mhi_register_controller()
1033 dev_set_name(&mhi_dev->dev, "mhi%d", mhi_cntrl->index); in mhi_register_controller()
1043 if (mhi_cntrl->edl_trigger) { in mhi_register_controller()
1049 mhi_cntrl->mhi_dev = mhi_dev; in mhi_register_controller()
1051 mhi_create_debugfs(mhi_cntrl); in mhi_register_controller()
1058 mhi_deinit_free_irq(mhi_cntrl); in mhi_register_controller()
1060 ida_free(&mhi_controller_ida, mhi_cntrl->index); in mhi_register_controller()
1062 destroy_workqueue(mhi_cntrl->hiprio_wq); in mhi_register_controller()
1064 kfree(mhi_cntrl->mhi_cmd); in mhi_register_controller()
1066 kfree(mhi_cntrl->mhi_event); in mhi_register_controller()
1067 vfree(mhi_cntrl->mhi_chan); in mhi_register_controller()
1073 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl) in mhi_unregister_controller() argument
1075 struct mhi_device *mhi_dev = mhi_cntrl->mhi_dev; in mhi_unregister_controller()
1076 struct mhi_chan *mhi_chan = mhi_cntrl->mhi_chan; in mhi_unregister_controller()
1079 mhi_deinit_free_irq(mhi_cntrl); in mhi_unregister_controller()
1080 mhi_destroy_debugfs(mhi_cntrl); in mhi_unregister_controller()
1082 if (mhi_cntrl->edl_trigger) in mhi_unregister_controller()
1085 destroy_workqueue(mhi_cntrl->hiprio_wq); in mhi_unregister_controller()
1086 kfree(mhi_cntrl->mhi_cmd); in mhi_unregister_controller()
1087 kfree(mhi_cntrl->mhi_event); in mhi_unregister_controller()
1090 for (i = 0; i < mhi_cntrl->max_chan; i++, mhi_chan++) { in mhi_unregister_controller()
1096 vfree(mhi_cntrl->mhi_chan); in mhi_unregister_controller()
1101 ida_free(&mhi_controller_ida, mhi_cntrl->index); in mhi_unregister_controller()
1107 struct mhi_controller *mhi_cntrl; in mhi_alloc_controller() local
1109 mhi_cntrl = kzalloc(sizeof(*mhi_cntrl), GFP_KERNEL); in mhi_alloc_controller()
1111 return mhi_cntrl; in mhi_alloc_controller()
1115 void mhi_free_controller(struct mhi_controller *mhi_cntrl) in mhi_free_controller() argument
1117 kfree(mhi_cntrl); in mhi_free_controller()
1121 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) in mhi_prepare_for_power_up() argument
1123 struct device *dev = &mhi_cntrl->mhi_dev->dev; in mhi_prepare_for_power_up()
1127 mutex_lock(&mhi_cntrl->pm_mutex); in mhi_prepare_for_power_up()
1129 ret = mhi_init_dev_ctxt(mhi_cntrl); in mhi_prepare_for_power_up()
1133 ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &bhi_off); in mhi_prepare_for_power_up()
1139 if (bhi_off >= mhi_cntrl->reg_len) { in mhi_prepare_for_power_up()
1141 bhi_off, mhi_cntrl->reg_len); in mhi_prepare_for_power_up()
1145 mhi_cntrl->bhi = mhi_cntrl->regs + bhi_off; in mhi_prepare_for_power_up()
1147 if (mhi_cntrl->fbc_download || mhi_cntrl->rddm_size) { in mhi_prepare_for_power_up()
1148 ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, in mhi_prepare_for_power_up()
1155 if (bhie_off >= mhi_cntrl->reg_len) { in mhi_prepare_for_power_up()
1158 bhie_off, mhi_cntrl->reg_len); in mhi_prepare_for_power_up()
1162 mhi_cntrl->bhie = mhi_cntrl->regs + bhie_off; in mhi_prepare_for_power_up()
1165 if (mhi_cntrl->rddm_size) { in mhi_prepare_for_power_up()
1170 memset_io(mhi_cntrl->bhie + BHIE_RXVECADDR_LOW_OFFS, in mhi_prepare_for_power_up()
1176 mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->rddm_image, in mhi_prepare_for_power_up()
1177 mhi_cntrl->rddm_size); in mhi_prepare_for_power_up()
1178 if (mhi_cntrl->rddm_image) { in mhi_prepare_for_power_up()
1179 ret = mhi_rddm_prepare(mhi_cntrl, in mhi_prepare_for_power_up()
1180 mhi_cntrl->rddm_image); in mhi_prepare_for_power_up()
1182 mhi_free_bhie_table(mhi_cntrl, in mhi_prepare_for_power_up()
1183 mhi_cntrl->rddm_image); in mhi_prepare_for_power_up()
1189 mutex_unlock(&mhi_cntrl->pm_mutex); in mhi_prepare_for_power_up()
1194 mhi_deinit_dev_ctxt(mhi_cntrl); in mhi_prepare_for_power_up()
1197 mutex_unlock(&mhi_cntrl->pm_mutex); in mhi_prepare_for_power_up()
1203 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl) in mhi_unprepare_after_power_down() argument
1205 if (mhi_cntrl->fbc_image) { in mhi_unprepare_after_power_down()
1206 mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image); in mhi_unprepare_after_power_down()
1207 mhi_cntrl->fbc_image = NULL; in mhi_unprepare_after_power_down()
1210 if (mhi_cntrl->rddm_image) { in mhi_unprepare_after_power_down()
1211 mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->rddm_image); in mhi_unprepare_after_power_down()
1212 mhi_cntrl->rddm_image = NULL; in mhi_unprepare_after_power_down()
1215 mhi_cntrl->bhi = NULL; in mhi_unprepare_after_power_down()
1216 mhi_cntrl->bhie = NULL; in mhi_unprepare_after_power_down()
1218 mhi_deinit_dev_ctxt(mhi_cntrl); in mhi_unprepare_after_power_down()
1241 struct mhi_device *mhi_alloc_device(struct mhi_controller *mhi_cntrl) in mhi_alloc_device() argument
1255 if (mhi_cntrl->mhi_dev) { in mhi_alloc_device()
1257 dev->parent = &mhi_cntrl->mhi_dev->dev; in mhi_alloc_device()
1260 dev->parent = mhi_cntrl->cntrl_dev; in mhi_alloc_device()
1263 mhi_dev->mhi_cntrl = mhi_cntrl; in mhi_alloc_device()
1272 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in mhi_driver_probe() local
1315 mhi_event = &mhi_cntrl->mhi_event[dl_chan->er_index]; in mhi_driver_probe()
1349 struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; in mhi_driver_remove() local
1383 mhi_reset_chan(mhi_cntrl, mhi_chan); in mhi_driver_remove()
1402 mhi_deinit_chan_ctxt(mhi_cntrl, mhi_chan); in mhi_driver_remove()