2  * CCI cache coherent interconnect driver
17 #include <linux/arm-cci.h>
49 	{.compatible = "arm,cci-400", .data = CCI400_PORTS_DATA },
52 	{ .compatible = "arm,cci-500", },
53 	{ .compatible = "arm,cci-550", },
59 	OF_DEV_AUXDATA("arm,cci-400-pmu", 0, NULL, &cci_ctrl_base),
60 	OF_DEV_AUXDATA("arm,cci-400-pmu,r0", 0, NULL, &cci_ctrl_base),
61 	OF_DEV_AUXDATA("arm,cci-400-pmu,r1", 0, NULL, &cci_ctrl_base),
62 	OF_DEV_AUXDATA("arm,cci-500-pmu,r0", 0, NULL, &cci_ctrl_base),
63 	OF_DEV_AUXDATA("arm,cci-550-pmu,r0", 0, NULL, &cci_ctrl_base),
67 #define DRIVER_NAME		"ARM-CCI"
72 		return -ENODEV;  in cci_platform_probe()
74 	return of_platform_populate(pdev->dev.of_node, NULL,  in cci_platform_probe()
75 				    arm_cci_auxdata, &pdev->dev);  in cci_platform_probe()
118 	u32 port;  member
122  * Use the port MSB as valid flag, shift can be made dynamic
123  * by computing number of bits required for port indexes.
124  * Code disabling CCI cpu ports runs with D-cache invalidated
127  * avoid one more data access while disabling the CCI port.
132 static inline void init_cpu_port(struct cpu_port *port, u32 index, u64 mpidr)  in init_cpu_port()  argument
134 	port->port = PORT_VALID | index;  in init_cpu_port()
135 	port->mpidr = mpidr;  in init_cpu_port()
138 static inline bool cpu_port_is_valid(struct cpu_port *port)  in cpu_port_is_valid()  argument
140 	return !!(port->port & PORT_VALID);  in cpu_port_is_valid()
143 static inline bool cpu_port_match(struct cpu_port *port, u64 mpidr)  in cpu_port_match()  argument
145 	return port->mpidr == (mpidr & MPIDR_HWID_BITMASK);  in cpu_port_match()
151  * __cci_ace_get_port - Function to retrieve the port index connected to
154  * @dn: device node of the device to look-up
155  * @type: port type
158  *	- CCI port index if success
159  *	- -ENODEV if failure
167 	cci_portn = of_parse_phandle(dn, "cci-control-port", 0);  in __cci_ace_get_port()
173 	return -ENODEV;  in __cci_ace_get_port()
184 	int port, cpu;  in cci_ace_init_ports()  local
188 	 * Port index look-up speeds up the function disabling ports by CPU,  in cci_ace_init_ports()
189 	 * since the logical to port index mapping is done once and does  in cci_ace_init_ports()
195 		/* too early to use cpu->of_node */  in cci_ace_init_ports()
201 		port = __cci_ace_get_port(cpun, ACE_PORT);  in cci_ace_init_ports()
202 		if (port < 0)  in cci_ace_init_ports()
205 		init_cpu_port(&cpu_port[cpu], port, cpu_logical_map(cpu));  in cci_ace_init_ports()
210 			"CPU %u does not have an associated CCI port\n",  in cci_ace_init_ports()
215  * Functions to enable/disable a CCI interconnect slave port
217  * They are called by low-level power management code to disable slave
221  * no explicit locking since they may run with D-cache disabled, so normal
228  * cci_port_control() - function to control a CCI port
230  * @port: index of the port to setup
231  * @enable: if true enables the port, if false disables it
233 static void notrace cci_port_control(unsigned int port, bool enable)  in cci_port_control()  argument
235 	void __iomem *base = ports[port].base;  in cci_port_control()
251  * cci_disable_port_by_cpu() - function to disable a CCI port by CPU
254  * @mpidr: mpidr of the CPU whose CCI port should be disabled
256  * Disabling a CCI port for a CPU implies disabling the CCI port
257  * controlling that CPU cluster. Code disabling CPU CCI ports
263  *	-ENODEV on port look-up failure
272 			cci_port_control(cpu_port[cpu].port, false);  in cci_disable_port_by_cpu()
276 	return -ENODEV;  in cci_disable_port_by_cpu()
281  * cci_enable_port_for_self() - enable a CCI port for calling CPU
283  * Enabling a CCI port for the calling CPU implies enabling the CCI
284  * port controlling that CPU's cluster. Caller must make sure that the
287  * to complete the CCI initialization.
294  * On success this returns with the proper CCI port enabled.  In case of
295  * any failure this never returns as the inability to enable the CCI is
301 "	.arch armv7-a\n"  in cci_enable_port_for_self()
314 	/* Found a match, now test port validity */  in cci_enable_port_for_self()
324 	/* CCI port not found -- cheaply try to stall this CPU */  in cci_enable_port_for_self()
330 	/* Use matched port index to look up the corresponding ports entry */  in cci_enable_port_for_self()
334 "	sub	r1, r1, r0 		@ virt - phys \n"  in cci_enable_port_for_self()
340 	/* Enable the CCI port */  in cci_enable_port_for_self()
357 "5:	.word	cpu_port - . \n"  in cci_enable_port_for_self()
359 "	.word	ports - 6b \n"  in cci_enable_port_for_self()
360 "7:	.word	cci_ctrl_phys - . \n"  in cci_enable_port_for_self()
370 	[offsetof_cpu_port_port] "i" (offsetof(struct cpu_port, port)),  in cci_enable_port_for_self()
377  * __cci_control_port_by_device() - function to control a CCI port by device
380  * @dn: device node pointer of the device whose CCI port should be
382  * @enable: if true enables the port, if false disables it
386  *	-ENODEV on port look-up failure
390 	int port;  in __cci_control_port_by_device()  local
393 		return -ENODEV;  in __cci_control_port_by_device()
395 	port = __cci_ace_get_port(dn, ACE_LITE_PORT);  in __cci_control_port_by_device()
396 	if (WARN_ONCE(port < 0, "node %pOF ACE lite port look-up failure\n",  in __cci_control_port_by_device()
398 		return -ENODEV;  in __cci_control_port_by_device()
399 	cci_port_control(port, enable);  in __cci_control_port_by_device()
405  * __cci_control_port_by_index() - function to control a CCI port by port index
407  * @port: port index previously retrieved with cci_ace_get_port()
408  * @enable: if true enables the port, if false disables it
412  *	-ENODEV on port index out of range
413  *	-EPERM if operation carried out on an ACE PORT
415 int notrace __cci_control_port_by_index(u32 port, bool enable)  in __cci_control_port_by_index()  argument
417 	if (port >= nb_cci_ports || ports[port].type == ACE_INVALID_PORT)  in __cci_control_port_by_index()
418 		return -ENODEV;  in __cci_control_port_by_index()
420 	 * CCI control for ports connected to CPUS is extremely fragile  in __cci_control_port_by_index()
422 	 * interface (ie cci_disable_port_by_cpu(); control by general purpose  in __cci_control_port_by_index()
425 	if (ports[port].type == ACE_PORT)  in __cci_control_port_by_index()
426 		return -EPERM;  in __cci_control_port_by_index()
428 	cci_port_control(port, enable);  in __cci_control_port_by_index()
434 	{.compatible = "arm,cci-400-ctrl-if", },
448 	cci_config = of_match_node(arm_cci_matches, np)->data;  in cci_probe_ports()
450 		return -ENODEV;  in cci_probe_ports()
452 	nb_cci_ports = cci_config->nb_ace + cci_config->nb_ace_lite;  in cci_probe_ports()
456 		return -ENOMEM;  in cci_probe_ports()
467 		if (of_property_read_string(cp, "interface-type",  in cci_probe_ports()
469 			WARN(1, "node %pOF missing interface-type property\n",  in cci_probe_ports()
474 		if (!is_ace && strcmp(match_str, "ace-lite")) {  in cci_probe_ports()
475 			WARN(1, "node %pOF containing invalid interface-type property, skipping it\n",  in cci_probe_ports()
486 			WARN(1, "unable to ioremap CCI port %d\n", i);  in cci_probe_ports()
491 			if (WARN_ON(nb_ace >= cci_config->nb_ace))  in cci_probe_ports()
496 			if (WARN_ON(nb_ace_lite >= cci_config->nb_ace_lite))  in cci_probe_ports()
505 	 * If there is no CCI port that is under kernel control  in cci_probe_ports()
509 		return -ENODEV;  in cci_probe_ports()
511 	 /* initialize a stashed array of ACE ports to speed-up look-up */  in cci_probe_ports()
515 	 * Multi-cluster systems may need this data when non-coherent, during  in cci_probe_ports()
516 	 * cluster power-up/power-down. Make sure it reaches main memory.  in cci_probe_ports()
523 	pr_info("ARM CCI driver probed\n");  in cci_probe_ports()
542 		return -ENODEV;  in cci_probe()
550 		WARN(1, "unable to ioremap CCI ctrl\n");  in cci_probe()
551 		return -ENXIO;  in cci_probe()
557 static int cci_init_status = -EAGAIN;
562 	if (cci_init_status != -EAGAIN)  in cci_init()
566 	if (cci_init_status == -EAGAIN)  in cci_init()
574  * check if the CCI driver has beed initialized. Function check if the driver
587 MODULE_DESCRIPTION("ARM CCI support");