Lines Matching +full:host +full:- +full:command
1 /* SPDX-License-Identifier: GPL-2.0 */
32 #define QUEUE_SIZE_CMD 16 /* command queue capacity */
52 #define RSD_REQUIRED (((MAX_PDU_SIZE - SMALL_BUFFER_SIZE + LARGE_BUFFER_SIZE) / LARGE_BUFFER_SIZE)…
56 /* RSD_REQUIRED receive segment descriptors are enough to describe a max-sized PDU,
61 #define RSD_EXTENSION ((RSD_REQUIRED - RSD_FIXED) + 1)
65 #define FORE200E_DEV(d) ((struct fore200e*)((d)->dev_data))
66 #define FORE200E_VCC(d) ((struct fore200e_vcc*)((d)->dev_data))
154 u32 handle; /* host supplied receive buffer handle */
189 u32 handle; /* host supplied handle */
190 u32 buffer_haddr; /* host DMA address of host buffer */
216 struct tpd_haddr tpd_haddr; /* host DMA address of tpd */
217 u32 status_haddr; /* host DMA address of completion status */
224 u32 rpd_haddr; /* host DMA address of rpd */
225 u32 status_haddr; /* host DMA address of completion status */
232 u32 rbd_block_haddr; /* host DMA address of rbd block */
233 u32 status_haddr; /* host DMA address of completion status */
240 STATUS_PENDING = (1<<0), /* initial status (written by host) */
242 STATUS_FREE = (1<<2), /* initial status (written by host) */
256 OPCODE_SET_OC3, /* set OC-3 registers */
257 OPCODE_GET_OC3, /* get OC-3 registers */
278 /* activate VC command opcode */
290 /* activate VC command block */
293 struct activate_opcode opcode; /* activate VC command opcode */
300 /* deactivate VC command opcode */
310 /* deactivate VC command block */
313 struct deactivate_opcode opcode; /* deactivate VC command opcode */
318 /* OC-3 registers */
321 u32 reg[ 128 ]; /* see the PMC Sierra PC5346 S/UNI-155-Lite
323 for a description of the OC-3 chip registers */
327 /* set/get OC-3 regs command opcode */
341 /* set/get OC-3 regs command block */
344 struct oc3_opcode opcode; /* set/get OC-3 regs command opcode */
345 u32 regs_haddr; /* host DMA address of OC-3 regs buffer */
358 /* OC-3 statistics */
443 struct stats_oc3 oc3; /* OC-3 statistics */
452 /* get statistics command opcode */
462 /* get statistics command block */
465 struct stats_opcode opcode; /* get statistics command opcode */
466 u32 stats_haddr; /* host DMA address of stats buffer */
479 /* get expansion PROM data command opcode */
489 /* get expansion PROM data command block */
492 struct prom_opcode opcode; /* get PROM data command opcode */
493 u32 prom_haddr; /* host DMA address of PROM buffer */
497 /* cp command */
505 struct oc3_block oc3_block; /* get/set OC-3 registers */
510 /* cp resident command queue */
513 union cmd cmd; /* command */
514 u32 status_haddr; /* host DMA address of completion status */
519 /* host resident transmit queue entry */
523 enum status* status; /* addr of host resident status */
534 /* host resident receive queue entry */
538 enum status* status; /* addr of host resident status */
544 /* host resident buffer supply queue entry */
548 enum status* status; /* addr of host resident status */
554 /* host resident command queue entry */
558 enum status *status; /* addr of host resident status */
576 /* host resident receive buffer */
599 /* host resident command queue */
602 …struct host_cmdq_entry host_entry[ QUEUE_SIZE_CMD ]; /* host resident cmd queue entries …
608 /* host resident transmit queue */
611 … struct host_txq_entry host_entry[ QUEUE_SIZE_TX ]; /* host resident tx queue entries */
620 /* host resident receive queue */
623 …struct host_rxq_entry host_entry[ QUEUE_SIZE_RX ]; /* host resident rx queue entries */
630 /* host resident buffer supply queues */
633 …struct host_bsq_entry host_entry[ QUEUE_SIZE_BS ]; /* host resident buffer supply queue entries…
659 u32 buffer_size; /* host buffer size */
666 /* initialization command block (one-time command, not in cmd queue) */
669 enum opcode opcode; /* initialize command */
673 u32 cmd_queue_len; /* length of command queue */
688 MEDIA_TYPE_SM_OC3_ST = 0x36, /* single-mode fiber ST */
689 MEDIA_TYPE_SM_OC3_SC = 0x46 /* single-mode fiber SC */
698 u32 cp_cmdq; /* command queue */
702 u32 imask; /* 1 enables cp to host interrupts */
706 u32 hlogger; /* non zero for host logging */
714 u32 oc3_revision; /* OC-3 revision number */
722 BSTAT_SELFTEST_OK = (u32) 0x02201958, /* self-test ok */
723 BSTAT_SELFTEST_FAIL = (u32) 0xadbadbad, /* self-test failed */
756 FORE200E_STATE_MAP, /* board space mapped in host memory */
759 FORE200E_STATE_INITIALIZE, /* initialize command successful */
760 FORE200E_STATE_INIT_CMDQ, /* command queue initialized */
765 FORE200E_STATE_IRQ, /* host interrupt requested */
770 /* PCA-200E registers */
773 volatile u32 __iomem * hcr; /* address of host control register */
774 volatile u32 __iomem * imr; /* address of host interrupt mask register */
779 /* SBA-200E registers */
782 u32 __iomem *hcr; /* address of host control register */
788 /* model-specific registers */
791 struct fore200e_pca_regs pca; /* PCA-200E registers */
792 struct fore200e_sba_regs sba; /* SBA-200E registers */
798 /* bus-dependent data */
827 (& (fore200e)->vc_map[ ((vpi) << FORE200E_VCI_BITS) | (vci) ])
830 /* per-device data */
833 const struct fore200e_bus* bus; /* bus-dependent code and data */
834 union fore200e_regs regs; /* bus-dependent registers */
849 struct host_cmdq host_cmdq; /* host resident cmd queue */
850 struct host_txq host_txq; /* host resident tx queue */
851 struct host_rxq host_rxq; /* host resident rx queue */
852 /* host resident buffer supply queues */
855 u32 available_cell_rate; /* remaining pseudo-CBR bw on link */
874 /* per-vcc data */
889 /* 200E-series common memory layout */
895 /* PCA-200E memory layout */
900 #define PCA200E_IMR_OFFSET 0x00100004 /* host IRQ mask register */
904 /* PCA-200E host control register */
919 /* PCA-200E PCI bus interface regs (offsets in PCI config space) */
927 #define PCA200E_CTRL_DIS_CACHE_RD (1<<0) /* disable cache-line reads …
929 #define PCA200E_CTRL_2_CACHE_WRT_INVAL (1<<2) /* require 2 cache-lines for writes and invalidate…
937 #define SBA200E_PROM_NAME "FORE,sba-200e" /* device name in openprom tree */
940 /* size of SBA-200E registers */
948 /* SBA-200E SBUS burst transfer size register */
955 /* SBA-200E host control register */