Lines Matching refs:dma_tim
215 union cvmx_mio_boot_dma_timx dma_tim; in octeon_cf_set_dmamode() local
233 dma_tim.u64 = 0; in octeon_cf_set_dmamode()
252 dma_tim.s.dmack_pi = (pin_defs.u64 & (1ull << (11 + c))) ? 0 : 1; in octeon_cf_set_dmamode()
254 dma_tim.s.oe_n = ns_to_tim_reg(tim_mult, oe_n); in octeon_cf_set_dmamode()
255 dma_tim.s.oe_a = ns_to_tim_reg(tim_mult, oe_a); in octeon_cf_set_dmamode()
261 dma_tim.s.dmack_s = ns_to_tim_reg(tim_mult, 20); in octeon_cf_set_dmamode()
262 dma_tim.s.dmack_h = ns_to_tim_reg(tim_mult, dma_ackh); in octeon_cf_set_dmamode()
264 dma_tim.s.dmarq = dma_arq; in octeon_cf_set_dmamode()
265 dma_tim.s.pause = ns_to_tim_reg(tim_mult, pause); in octeon_cf_set_dmamode()
267 dma_tim.s.rd_dly = 0; /* Sample right on edge */ in octeon_cf_set_dmamode()
270 dma_tim.s.we_n = ns_to_tim_reg(tim_mult, oe_n); in octeon_cf_set_dmamode()
271 dma_tim.s.we_a = ns_to_tim_reg(tim_mult, oe_a); in octeon_cf_set_dmamode()
276 dma_tim.s.oe_n, dma_tim.s.oe_a, dma_tim.s.dmack_s, in octeon_cf_set_dmamode()
277 dma_tim.s.dmack_h, dma_tim.s.dmarq, dma_tim.s.pause); in octeon_cf_set_dmamode()
279 cvmx_write_csr(cf_port->dma_base + DMA_TIM, dma_tim.u64); in octeon_cf_set_dmamode()