1 // SPDX-License-Identifier: GPL-2.0-only
3  * pata_mpiix.c 	- Intel MPIIX PATA for new ATA layer
4  *			  (C) 2005-2006 Red Hat Inc
12  * devices. The chip is a bridge (pardon the pun) between the old world of
14  * IDE controller is not decoded in PCI space and the chip does not claim to
15  * be IDE class PCI. This requires slightly non-standard probe logic compared
51 	struct ata_port *ap = link->ap;  in mpiix_pre_reset()
52 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in mpiix_pre_reset()
56 		return -ENOENT;  in mpiix_pre_reset()
62  *	mpiix_set_piomode	-	set initial PIO mode data
67  *	IORDY sample point (2-5 clocks), recovery (1-4 clocks) and whether
72  *	our qc_issue command before a command is issued so we can flip the
79 	int pio = adev->pio_mode - XFER_PIO_0;  in mpiix_set_piomode()
80 	struct pci_dev *pdev = to_pci_dev(ap->host->dev);  in mpiix_set_piomode()
92 	if (adev->class == ATA_DEV_ATA)  in mpiix_set_piomode()
101 	idetim &= ~(0x07  << (4 * adev->devno));  in mpiix_set_piomode()
102 	idetim |= control << (4 * adev->devno);  in mpiix_set_piomode()
107 	/* We use ap->private_data as a pointer to the device currently  in mpiix_set_piomode()
109 	ap->private_data = adev;  in mpiix_set_piomode()
113  *	mpiix_qc_issue		-	command issue
125 	struct ata_port *ap = qc->ap;  in mpiix_qc_issue()
126 	struct ata_device *adev = qc->dev;  in mpiix_qc_issue()
130 	   does not set adev->pio_mode to XFER_PIO_0 while probing as would be  in mpiix_qc_issue()
133 	if (adev->pio_mode && adev != ap->private_data)  in mpiix_qc_issue()
161 	ata_print_version_once(&dev->dev, DRV_VERSION);  in mpiix_init_one()
163 	host = ata_host_alloc(&dev->dev, 1);  in mpiix_init_one()
165 		return -ENOMEM;  in mpiix_init_one()
166 	ap = host->ports[0];  in mpiix_init_one()
174 		return -ENODEV;  in mpiix_init_one()
187 	cmd_addr = devm_ioport_map(&dev->dev, cmd, 8);  in mpiix_init_one()
188 	ctl_addr = devm_ioport_map(&dev->dev, ctl, 1);  in mpiix_init_one()
190 		return -ENOMEM;  in mpiix_init_one()
196 	   worry about.  #1 The chip is a bridge so if in legacy mode and  in mpiix_init_one()
200 	ap->ops = &mpiix_port_ops;  in mpiix_init_one()
201 	ap->pio_mask = ATA_PIO4;  in mpiix_init_one()
202 	ap->flags |= ATA_FLAG_SLAVE_POSS;  in mpiix_init_one()
204 	ap->ioaddr.cmd_addr = cmd_addr;  in mpiix_init_one()
205 	ap->ioaddr.ctl_addr = ctl_addr;  in mpiix_init_one()
206 	ap->ioaddr.altstatus_addr = ctl_addr;  in mpiix_init_one()
209 	ata_sff_std_ports(&ap->ioaddr);  in mpiix_init_one()
236 MODULE_DESCRIPTION("low-level driver for Intel MPIIX");