83 static int imx_phy_crbit_assert(void __iomem *mmio, u32 bit, bool assert)  in imx_phy_crbit_assert()  argument
90 	crval = readl(mmio + IMX_P0PHYCR);  in imx_phy_crbit_assert()
95 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_crbit_assert()
99 		srval = readl(mmio + IMX_P0PHYSR);  in imx_phy_crbit_assert()
108 static int imx_phy_reg_addressing(u16 addr, void __iomem *mmio)  in imx_phy_reg_addressing()  argument
114 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_addressing()
117 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, true);  in imx_phy_reg_addressing()
122 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_ADDR, false);  in imx_phy_reg_addressing()
129 static int imx_phy_reg_write(u16 val, void __iomem *mmio)  in imx_phy_reg_write()  argument
135 	writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_write()
138 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, true);  in imx_phy_reg_write()
143 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_CAP_DATA, false);  in imx_phy_reg_write()
153 		writel(crval, mmio + IMX_P0PHYCR);  in imx_phy_reg_write()
158 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, true);  in imx_phy_reg_write()
163 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_WRITE, false);  in imx_phy_reg_write()
171 static int imx_phy_reg_read(u16 *val, void __iomem *mmio)  in imx_phy_reg_read()  argument
176 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, true);  in imx_phy_reg_read()
181 	*val = readl(mmio + IMX_P0PHYSR) & IMX_P0PHYSR_CR_DATA_OUT;  in imx_phy_reg_read()
184 	ret = imx_phy_crbit_assert(mmio, IMX_P0PHYCR_CR_READ, false);  in imx_phy_reg_read()
194 	void __iomem *mmio = hpriv->mmio;  in imx_sata_phy_reset()  local
214 	ret = imx_phy_reg_addressing(IMX_CLOCK_RESET, mmio);  in imx_sata_phy_reset()
217 	ret = imx_phy_reg_write(IMX_CLOCK_RESET_RESET, mmio);  in imx_sata_phy_reset()
224 		ret = imx_phy_reg_addressing(IMX_LANE0_OUT_STAT, mmio);  in imx_sata_phy_reset()
227 		ret = imx_phy_reg_read(&val, mmio);  in imx_sata_phy_reset()
246 static int read_adc_sum(void *dev, u16 rtune_ctl_reg, void __iomem * mmio)  in read_adc_sum()  argument
252 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in read_adc_sum()
253 	imx_phy_reg_write(rtune_ctl_reg, mmio);  in read_adc_sum()
259 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_ADC_OUT, mmio);  in read_adc_sum()
261 		imx_phy_reg_read(&adc_out_reg, mmio);  in read_adc_sum()
278 		imx_phy_reg_read(&adc_out_reg, mmio);  in read_adc_sum()
302 	void __iomem *mmio = hpriv->mmio;  in __sata_ahci_read_temperature()  local
306 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_CRCMP_LT_LIMIT, mmio);  in __sata_ahci_read_temperature()
307 	imx_phy_reg_write(read_sum, mmio);  in __sata_ahci_read_temperature()
308 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
312 	imx_phy_reg_write(0x5A5A, mmio);  in __sata_ahci_read_temperature()
313 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
317 	imx_phy_reg_write(0x1234, mmio);  in __sata_ahci_read_temperature()
318 	imx_phy_reg_read(&read_sum, mmio);  in __sata_ahci_read_temperature()
323 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
324 	imx_phy_reg_read(&mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
325 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in __sata_ahci_read_temperature()
326 	imx_phy_reg_read(&rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
327 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
328 	imx_phy_reg_read(&dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
348 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
349 	imx_phy_reg_write(mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
350 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
351 	imx_phy_reg_write(dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
352 	m1 = read_adc_sum(dev, rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
357 	m2 = read_adc_sum(dev, rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
369 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_MPLL_TST, mmio);  in __sata_ahci_read_temperature()
370 	imx_phy_reg_write(mpll_test_reg, mmio);  in __sata_ahci_read_temperature()
371 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_DAC_CTL, mmio);  in __sata_ahci_read_temperature()
372 	imx_phy_reg_write(dac_ctl_reg, mmio);  in __sata_ahci_read_temperature()
373 	imx_phy_reg_addressing(SATA_PHY_CR_CLOCK_RTUNE_CTL, mmio);  in __sata_ahci_read_temperature()
374 	imx_phy_reg_write(rtune_ctl_reg, mmio);  in __sata_ahci_read_temperature()
474 	val = readl(hpriv->mmio + IMX8QM_SATA_AHCI_PTC);  in imx8_sata_enable()
477 	writel(val, hpriv->mmio + IMX8QM_SATA_AHCI_PTC);  in imx8_sata_enable()
606 	void __iomem *mmio = hpriv->mmio;  in ahci_imx_error_handler()  local
626 	reg_val = readl(mmio + IMX_P0PHYCR);  in ahci_imx_error_handler()
627 	writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR);  in ahci_imx_error_handler()
947 	reg_val = readl(hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
950 		writel(reg_val, hpriv->mmio + HOST_CAP);  in imx_ahci_probe()
952 	reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
955 		writel(reg_val, hpriv->mmio + HOST_PORTS_IMPL);  in imx_ahci_probe()
970 		writel(reg_val, hpriv->mmio + IMX_TIMER1MS);  in imx_ahci_probe()