Lines Matching +full:loongson +full:- +full:1 +full:c
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2016 Broadcom
4 * Author: Jayachandran C <jchandra@broadcom.com>
5 * Copyright (C) 2016 Semihalf
13 #include <linux/pci-acpi.h>
14 #include <linux/pci-ecam.h>
27 char oem_id[ACPI_OEM_ID_SIZE + 1];
28 char oem_table_id[ACPI_OEM_TABLE_ID_SIZE + 1];
37 ((end) - (start) + 1), \
50 AL_ECAM("GRAVITON", 0, 1, &al_pcie_ops),
59 { "QCOM ", "QDF2432 ", 1, seg, MCFG_BUS_ANY, &pci_32b_ops }
62 QCOM_ECAM32(1),
72 { "HISI ", table_id, 0, (seg) + 1, MCFG_BUS_ANY, ops }, \
105 THUNDER_PEM_QUIRK(1, 0),
106 THUNDER_PEM_QUIRK(1, 1),
107 THUNDER_ECAM_QUIRK(1, 10),
110 THUNDER_PEM_QUIRK(2, 0), /* off-chip devices */
111 THUNDER_PEM_QUIRK(2, 1), /* off-chip devices */
113 THUNDER_ECAM_QUIRK(2, 1),
121 { "NVIDIA", "TEGRA194", 1, 0, MCFG_BUS_ANY, &tegra194_pcie_ops},
122 { "NVIDIA", "TEGRA194", 1, 1, MCFG_BUS_ANY, &tegra194_pcie_ops},
123 { "NVIDIA", "TEGRA194", 1, 2, MCFG_BUS_ANY, &tegra194_pcie_ops},
124 { "NVIDIA", "TEGRA194", 1, 3, MCFG_BUS_ANY, &tegra194_pcie_ops},
125 { "NVIDIA", "TEGRA194", 1, 4, MCFG_BUS_ANY, &tegra194_pcie_ops},
126 { "NVIDIA", "TEGRA194", 1, 5, MCFG_BUS_ANY, &tegra194_pcie_ops},
136 /* X-Gene SoC with v1 PCIe controller */
137 XGENE_V1_ECAM_MCFG(1, 0),
138 XGENE_V1_ECAM_MCFG(1, 1),
139 XGENE_V1_ECAM_MCFG(1, 2),
140 XGENE_V1_ECAM_MCFG(1, 3),
141 XGENE_V1_ECAM_MCFG(1, 4),
143 XGENE_V1_ECAM_MCFG(2, 1),
147 /* X-Gene SoC with v2.1 PCIe controller */
149 XGENE_V2_ECAM_MCFG(3, 1),
150 /* X-Gene SoC with v2.2 PCIe controller */
152 XGENE_V2_ECAM_MCFG(4, 1),
158 ALTRA_ECAM_QUIRK(1, 0),
159 ALTRA_ECAM_QUIRK(1, 1),
160 ALTRA_ECAM_QUIRK(1, 2),
161 ALTRA_ECAM_QUIRK(1, 3),
162 ALTRA_ECAM_QUIRK(1, 4),
163 ALTRA_ECAM_QUIRK(1, 5),
164 ALTRA_ECAM_QUIRK(1, 6),
165 ALTRA_ECAM_QUIRK(1, 7),
166 ALTRA_ECAM_QUIRK(1, 8),
167 ALTRA_ECAM_QUIRK(1, 9),
168 ALTRA_ECAM_QUIRK(1, 10),
169 ALTRA_ECAM_QUIRK(1, 11),
170 ALTRA_ECAM_QUIRK(1, 12),
171 ALTRA_ECAM_QUIRK(1, 13),
172 ALTRA_ECAM_QUIRK(1, 14),
173 ALTRA_ECAM_QUIRK(1, 15),
178 { "LOONGS", table_id, 1, seg, MCFG_BUS_ANY, &loongson_pci_ecam_ops }
181 LOONGSON_ECAM_MCFG("LOONGSON", 0),
182 LOONGSON_ECAM_MCFG("\0", 1),
183 LOONGSON_ECAM_MCFG("LOONGSON", 1),
185 LOONGSON_ECAM_MCFG("LOONGSON", 2),
187 LOONGSON_ECAM_MCFG("LOONGSON", 3),
189 LOONGSON_ECAM_MCFG("LOONGSON", 4),
191 LOONGSON_ECAM_MCFG("LOONGSON", 5),
193 LOONGSON_ECAM_MCFG("LOONGSON", 6),
195 LOONGSON_ECAM_MCFG("LOONGSON", 7),
206 if (!memcmp(f->oem_id, mcfg_oem_id, ACPI_OEM_ID_SIZE) && in pci_mcfg_quirk_matches()
207 !memcmp(f->oem_table_id, mcfg_oem_table_id, in pci_mcfg_quirk_matches()
209 f->oem_revision == mcfg_oem_revision && in pci_mcfg_quirk_matches()
210 f->segment == segment && in pci_mcfg_quirk_matches()
211 resource_contains(&f->bus_range, bus_range)) in pci_mcfg_quirk_matches()
212 return 1; in pci_mcfg_quirk_matches()
223 u16 segment = root->segment; in pci_mcfg_apply_quirks()
224 struct resource *bus_range = &root->secondary; in pci_mcfg_apply_quirks()
230 if (f->cfgres.start) in pci_mcfg_apply_quirks()
231 *cfgres = f->cfgres; in pci_mcfg_apply_quirks()
232 if (f->ops) in pci_mcfg_apply_quirks()
233 *ecam_ops = f->ops; in pci_mcfg_apply_quirks()
234 dev_info(&root->device->dev, "MCFG quirk: ECAM at %pR for %pR with %ps\n", in pci_mcfg_apply_quirks()
249 struct resource *bus_res = &root->secondary; in pci_mcfg_lookup()
250 u16 seg = root->segment; in pci_mcfg_lookup()
255 if (root->mcfg_addr) in pci_mcfg_lookup()
262 if (e->segment == seg && e->bus_start <= bus_res->start && in pci_mcfg_lookup()
263 e->bus_end >= bus_res->end) { in pci_mcfg_lookup()
264 root->mcfg_addr = e->addr; in pci_mcfg_lookup()
271 if (root->mcfg_addr) { in pci_mcfg_lookup()
272 res.start = root->mcfg_addr + (bus_res->start << 20); in pci_mcfg_lookup()
273 res.end = res.start + (resource_size(bus_res) << 20) - 1; in pci_mcfg_lookup()
285 return -ENXIO; in pci_mcfg_lookup()
299 if (header->length < sizeof(struct acpi_table_mcfg)) in pci_mcfg_parse()
300 return -EINVAL; in pci_mcfg_parse()
302 n = (header->length - sizeof(struct acpi_table_mcfg)) / in pci_mcfg_parse()
305 mptr = (struct acpi_mcfg_allocation *) &mcfg[1]; in pci_mcfg_parse()
309 return -ENOMEM; in pci_mcfg_parse()
312 e->segment = mptr->pci_segment; in pci_mcfg_parse()
313 e->addr = mptr->address; in pci_mcfg_parse()
314 e->bus_start = mptr->start_bus_number; in pci_mcfg_parse()
315 e->bus_end = mptr->end_bus_number; in pci_mcfg_parse()
316 list_add(&e->list, &pci_mcfg_list); in pci_mcfg_parse()
321 memcpy(mcfg_oem_id, header->oem_id, ACPI_OEM_ID_SIZE); in pci_mcfg_parse()
322 memcpy(mcfg_oem_table_id, header->oem_table_id, ACPI_OEM_TABLE_ID_SIZE); in pci_mcfg_parse()
323 mcfg_oem_revision = header->oem_revision; in pci_mcfg_parse()
330 /* Interface called by ACPI - parse and save MCFG table */