Lines Matching refs:REGV_WR32
439 REGV_WR32(IVPU_MMU_REG_CR0, val); in ivpu_mmu_reg_write_cr0()
446 REGV_WR32(IVPU_MMU_REG_IRQ_CTRL, val); in ivpu_mmu_reg_write_irq_ctrl()
524 REGV_WR32(IVPU_MMU_REG_CMDQ_PROD, q->prod); in ivpu_mmu_cmdq_sync()
590 REGV_WR32(IVPU_MMU_REG_CR1, val); in ivpu_mmu_reset()
593 REGV_WR32(IVPU_MMU_REG_STRTAB_BASE_CFG, mmu->strtab.base_cfg); in ivpu_mmu_reset()
596 REGV_WR32(IVPU_MMU_REG_CMDQ_PROD, 0); in ivpu_mmu_reset()
597 REGV_WR32(IVPU_MMU_REG_CMDQ_CONS, 0); in ivpu_mmu_reset()
617 REGV_WR32(IVPU_MMU_REG_EVTQ_PROD_SEC, 0); in ivpu_mmu_reset()
618 REGV_WR32(IVPU_MMU_REG_EVTQ_CONS_SEC, 0); in ivpu_mmu_reset()
917 REGV_WR32(IVPU_MMU_REG_EVTQ_CONS_SEC, vdev->mmu->evtq.cons); in ivpu_mmu_irq_evtq_handler()
966 REGV_WR32(IVPU_MMU_REG_GERRORN, gerror_val); in ivpu_mmu_irq_gerr_handler()