Lines Matching refs:vpu_jsm_msg
95 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_REGISTER_DB }; in ivpu_jsm_register_db()
96 struct vpu_jsm_msg resp; in ivpu_jsm_register_db()
114 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_UNREGISTER_DB }; in ivpu_jsm_unregister_db()
115 struct vpu_jsm_msg resp; in ivpu_jsm_unregister_db()
130 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_QUERY_ENGINE_HB }; in ivpu_jsm_get_heartbeat()
131 struct vpu_jsm_msg resp; in ivpu_jsm_get_heartbeat()
153 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_ENGINE_RESET }; in ivpu_jsm_reset_engine()
154 struct vpu_jsm_msg resp; in ivpu_jsm_reset_engine()
172 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_ENGINE_PREEMPT }; in ivpu_jsm_preempt_engine()
173 struct vpu_jsm_msg resp; in ivpu_jsm_preempt_engine()
192 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_DYNDBG_CONTROL }; in ivpu_jsm_dyndbg_control()
193 struct vpu_jsm_msg resp; in ivpu_jsm_dyndbg_control()
210 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_TRACE_GET_CAPABILITY }; in ivpu_jsm_trace_get_capability()
211 struct vpu_jsm_msg resp; in ivpu_jsm_trace_get_capability()
230 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_TRACE_SET_CONFIG }; in ivpu_jsm_trace_set_config()
231 struct vpu_jsm_msg resp; in ivpu_jsm_trace_set_config()
248 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_SSID_RELEASE }; in ivpu_jsm_context_release()
249 struct vpu_jsm_msg resp; in ivpu_jsm_context_release()
264 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_PWR_D0I3_ENTER }; in ivpu_jsm_pwr_d0i3_enter()
265 struct vpu_jsm_msg resp; in ivpu_jsm_pwr_d0i3_enter()
285 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_CREATE_CMD_QUEUE }; in ivpu_jsm_hws_create_cmdq()
286 struct vpu_jsm_msg resp; in ivpu_jsm_hws_create_cmdq()
307 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_DESTROY_CMD_QUEUE }; in ivpu_jsm_hws_destroy_cmdq()
308 struct vpu_jsm_msg resp; in ivpu_jsm_hws_destroy_cmdq()
325 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_HWS_REGISTER_DB }; in ivpu_jsm_hws_register_db()
326 struct vpu_jsm_msg resp; in ivpu_jsm_hws_register_db()
345 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_HWS_ENGINE_RESUME }; in ivpu_jsm_hws_resume_engine()
346 struct vpu_jsm_msg resp; in ivpu_jsm_hws_resume_engine()
365 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_SET_CONTEXT_SCHED_PROPERTIES }; in ivpu_jsm_hws_set_context_sched_properties()
366 struct vpu_jsm_msg resp; in ivpu_jsm_hws_set_context_sched_properties()
389 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_HWS_SET_SCHEDULING_LOG }; in ivpu_jsm_hws_set_scheduling_log()
390 struct vpu_jsm_msg resp; in ivpu_jsm_hws_set_scheduling_log()
410 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_SET_PRIORITY_BAND_SETUP }; in ivpu_jsm_hws_setup_priority_bands()
411 struct vpu_jsm_msg resp; in ivpu_jsm_hws_setup_priority_bands()
444 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_METRIC_STREAMER_START }; in ivpu_jsm_metric_streamer_start()
445 struct vpu_jsm_msg resp; in ivpu_jsm_metric_streamer_start()
465 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_METRIC_STREAMER_STOP }; in ivpu_jsm_metric_streamer_stop()
466 struct vpu_jsm_msg resp; in ivpu_jsm_metric_streamer_stop()
482 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_METRIC_STREAMER_UPDATE }; in ivpu_jsm_metric_streamer_update()
483 struct vpu_jsm_msg resp; in ivpu_jsm_metric_streamer_update()
511 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_METRIC_STREAMER_INFO }; in ivpu_jsm_metric_streamer_info()
512 struct vpu_jsm_msg resp; in ivpu_jsm_metric_streamer_info()
541 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_DCT_ENABLE }; in ivpu_jsm_dct_enable()
542 struct vpu_jsm_msg resp; in ivpu_jsm_dct_enable()
554 struct vpu_jsm_msg req = { .type = VPU_JSM_MSG_DCT_DISABLE }; in ivpu_jsm_dct_disable()
555 struct vpu_jsm_msg resp; in ivpu_jsm_dct_disable()