105 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_register_db()
121 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_unregister_db()
140 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_get_heartbeat()
163 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_reset_engine()
183 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_preempt_engine()
199 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_dyndbg_control()
215 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_trace_get_capability()
239 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_trace_set_config()
255 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_context_release()
298 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_create_cmdq()
315 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_destroy_cmdq()
336 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_register_db()
355 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_resume_engine()
379 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_set_context_sched_properties()
401 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_set_scheduling_log()
434 					   &resp, VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_hws_setup_priority_bands()
454 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_metric_streamer_start()
472 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_metric_streamer_stop()
491 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_metric_streamer_update()
520 				    VPU_IPC_CHAN_ASYNC_CMD, vdev->timeout.jsm);  in ivpu_jsm_metric_streamer_info()
549 					    vdev->timeout.jsm);  in ivpu_jsm_dct_enable()
559 					    vdev->timeout.jsm);  in ivpu_jsm_dct_disable()