76 	u32 val = 0;  in host_ss_rst_clr()  local
87 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QREQN);  in host_ss_noc_qreqn_check_37xx()  local
97 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QREQN);  in host_ss_noc_qreqn_check_40xx()  local
115 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QACCEPTN);  in host_ss_noc_qacceptn_check_37xx()  local
125 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QACCEPTN);  in host_ss_noc_qacceptn_check_40xx()  local
143 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QDENY);  in host_ss_noc_qdeny_check_37xx()  local
153 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QDENY);  in host_ss_noc_qdeny_check_40xx()  local
171 	u32 val = REGV_RD32(VPU_37XX_TOP_NOC_QREQN);  in top_noc_qrenqn_check_37xx()  local
182 	u32 val = REGV_RD32(VPU_40XX_TOP_NOC_QREQN);  in top_noc_qrenqn_check_40xx()  local
233 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_VPU_IDLE_GEN);  in idle_gen_drive_37xx()  local
245 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_IDLE_GEN);  in idle_gen_drive_40xx()  local
273 	u32 val, post, status;  in pwr_island_delay_set_50xx()  local
294 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0);  in pwr_island_trickle_drive_37xx()  local
306 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_TRICKLE_EN0);  in pwr_island_trickle_drive_40xx()  local
321 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISLAND_EN0);  in pwr_island_drive_37xx()  local
336 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISLAND_EN0);  in pwr_island_drive_40xx()  local
372 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_PWR_ISO_EN0);  in pwr_island_isolation_drive_37xx()  local
384 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_AON_PWR_ISO_EN0);  in pwr_island_isolation_drive_40xx()  local
409 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_CPR_CLK_SET);  in host_ss_clk_drive_37xx()  local
426 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_CPR_CLK_EN);  in host_ss_clk_drive_40xx()  local
456 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_CPR_RST_SET);  in host_ss_rst_drive_37xx()  local
473 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_CPR_RST_EN);  in host_ss_rst_drive_40xx()  local
503 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_NOC_QREQN);  in host_ss_noc_qreqn_top_socmmio_drive_37xx()  local
514 	u32 val = REGV_RD32(VPU_40XX_HOST_SS_NOC_QREQN);  in host_ss_noc_qreqn_top_socmmio_drive_40xx()  local
552 	u32 val = REGV_RD32(VPU_40XX_TOP_NOC_QREQN);  in top_noc_qreqn_drive_40xx()  local
567 	u32 val = REGV_RD32(VPU_37XX_TOP_NOC_QREQN);  in top_noc_qreqn_drive_37xx()  local
595 	u32 val = REGV_RD32(VPU_37XX_TOP_NOC_QACCEPTN);  in top_noc_qacceptn_check_37xx()  local
606 	u32 val = REGV_RD32(VPU_40XX_TOP_NOC_QACCEPTN);  in top_noc_qacceptn_check_40xx()  local
625 	u32 val = REGV_RD32(VPU_37XX_TOP_NOC_QDENY);  in top_noc_qdeny_check_37xx()  local
636 	u32 val = REGV_RD32(VPU_40XX_TOP_NOC_QDENY);  in top_noc_qdeny_check_40xx()  local
679 	u32 val = REGV_RD32(VPU_37XX_HOST_SS_AON_DPU_ACTIVE);  in dpu_active_drive_37xx()  local
730 	u32 val = REGV_RD32(VPU_37XX_HOST_IF_TCU_PTW_OVERRIDES);  in ivpu_hw_ip_snoop_disable_37xx()  local
745 	u32 val = REGV_RD32(VPU_40XX_HOST_IF_TCU_PTW_OVERRIDES);  in ivpu_hw_ip_snoop_disable_40xx()  local
768 	u32 val = REGV_RD32(VPU_37XX_HOST_IF_TBU_MMUSSIDV);  in ivpu_hw_ip_tbu_mmu_enable_37xx()  local
780 	u32 val = REGV_RD32(VPU_40XX_HOST_IF_TBU_MMUSSIDV);  in ivpu_hw_ip_tbu_mmu_enable_40xx()  local
802 	u32 val;  in soc_cpu_boot_37xx()  local
830 	u32 val = REGV_RD32(VPU_40XX_CPU_SS_CPR_NOC_QACCEPTN);  in cpu_noc_qacceptn_check_40xx()  local
840 	u32 val = REGV_RD32(VPU_40XX_CPU_SS_CPR_NOC_QDENY);  in cpu_noc_qdeny_check_40xx()  local
850 	u32 val = REGV_RD32(VPU_40XX_CPU_SS_CPR_NOC_QREQN);  in cpu_noc_top_mmio_drive_40xx()  local
886 	u32 val;  in soc_cpu_boot_40xx()  local
919 	u32 val;  in wdt_disable_37xx()  local
937 	u32 val;  in wdt_disable_40xx()  local
1142 	u32 val = REG_FLD(VPU_37XX_CPU_SS_DOORBELL_0, SET);  in db_set_37xx()  local
1150 	u32 val = REG_FLD(VPU_40XX_CPU_SS_DOORBELL_0, SET);  in db_set_40xx()  local