392 	prop->cfg_base_address = CFG_BASE;  in goya_set_fixed_properties()
465 	prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI;  in goya_set_fixed_properties()
519 			(CFG_BASE - SRAM_BASE_ADDR);  in goya_pci_bars_map()
650 	rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0,  in goya_early_init()
935 	region->region_base = CFG_BASE;  in goya_set_pci_memory_regions()
937 	region->offset_in_bar = CFG_BASE - SRAM_BASE_ADDR;  in goya_set_pci_memory_regions()
1091 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1092 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_dma_qman()
1093 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1094 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_dma_qman()
1097 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1099 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_qman()
1140 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1142 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_dma_ch()
1150 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_init_dma_ch()
1153 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_init_dma_ch()
1446 	tpc_eml_address = (mmTPC0_EML_CFG_BASE + tpc_eml_offset - CFG_BASE);  in _goya_tpc_mbist_workaround()
1832 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1833 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_qman()
1834 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1835 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qman()
1838 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1840 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_qman()
1881 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1882 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_mme_cmdq()
1883 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1884 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_cmdq()
1887 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1889 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_mme_cmdq()
1919 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1920 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_mme_qmans()
1939 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1940 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_qman()
1941 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1942 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qman()
1945 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1947 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_qman()
1988 	mtr_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1989 	mtr_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_MON_PAY_ADDRL_0);  in goya_init_tpc_cmdq()
1990 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1991 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_cmdq()
1994 		lower_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
1996 		upper_32_bits(CFG_BASE + mmGIC_DISTRIBUTOR__5_GICD_SETSPI_NSR);  in goya_init_tpc_cmdq()
2029 	so_base_lo = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2030 	so_base_hi = upper_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_init_tpc_qmans()
2440 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_enable_timestamp()
2443 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0);  in goya_enable_timestamp()
2444 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0);  in goya_enable_timestamp()
2447 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1);  in goya_enable_timestamp()
2453 	WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0);  in goya_disable_timestamp()
3625 	sob_start_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_0);  in goya_validate_wreg32()
3626 	sob_end_addr = lower_32_bits(CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1023);  in goya_validate_wreg32()
4163 	cq_pkt->addr = cpu_to_le64(CFG_BASE + mmPCIE_DBI_MSIX_DOORBELL_OFF);  in goya_add_end_of_cb_packets()
4843 	sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1007;  in goya_context_switch()
4847 		sob_addr = CFG_BASE + mmSYNC_MNGR_SOB_OBJ_1000 +  in goya_context_switch()