Lines Matching +full:0 +full:x3ffc
154 [GAUDI2_STM_PSOC_ARC0_CS] = 0,
155 [GAUDI2_STM_PSOC_ARC1_CS] = 0,
296 [GAUDI2_ETF_PSOC_ARC0_CS] = 0,
297 [GAUDI2_ETF_PSOC_ARC1_CS] = 0,
439 [GAUDI2_FUNNEL_PSOC_ARC0] = 0,
440 [GAUDI2_FUNNEL_PSOC_ARC1] = 0,
769 [GAUDI2_BMON_PSOC_ARC0_0] = 0,
770 [GAUDI2_BMON_PSOC_ARC0_1] = 0,
771 [GAUDI2_BMON_PSOC_ARC1_0] = 0,
772 [GAUDI2_BMON_PSOC_ARC1_1] = 0,
971 [GAUDI2_SPMU_PSOC_ARC0_CS] = 0,
972 [GAUDI2_SPMU_PSOC_ARC1_CS] = 0,
1026 .bmon_count = 0,
1034 .bmon_count = 0,
1042 .bmon_count = 0,
1050 .bmon_count = 0,
1289 .bmon_count = 0,
1297 .bmon_count = 0,
1305 .bmon_count = 0,
1313 .bmon_count = 0,
1321 .bmon_count = 0,
1329 .bmon_count = 0,
1340 .bmon_count = 0,
1348 .bmon_count = 0,
1356 .bmon_count = 0,
1364 .bmon_count = 0,
1372 .bmon_count = 0,
1380 .bmon_count = 0,
1948 "Timeout while waiting for coresight, addr: 0x%llx, position: %d, up: %d\n", in gaudi2_coresight_timeout()
1957 int rc = 0; in gaudi2_unlock_coresight_unit()
1962 1, 0); in gaudi2_unlock_coresight_unit()
1966 "Failed to unlock register base addr: 0x%llx , position: 1, up: 0\n", in gaudi2_unlock_coresight_unit()
1988 * in case base reg is 0x0 we ignore this configuration in gaudi2_config_stm()
1991 return 0; in gaudi2_config_stm()
1994 * we check offset 0xCFC STMDMAIDR in case in gaudi2_config_stm()
1995 * return value is 0x0 - hence stub component in gaudi2_config_stm()
1998 if (hdev->pldm && read_reg == 0x0) in gaudi2_config_stm()
1999 return 0; in gaudi2_config_stm()
2011 WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x80004); in gaudi2_config_stm()
2017 WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 0); in gaudi2_config_stm()
2021 WREG32(base_reg + mmSTM_STMSPTRIGCSR_OFFSET, 0x10); in gaudi2_config_stm()
2022 WREG32(base_reg + mmSTM_STMSPSCR_OFFSET, 0); in gaudi2_config_stm()
2025 WREG32(base_reg + mmSTM_STMHEMASTR_OFFSET, 0x80); in gaudi2_config_stm()
2027 if (frequency == 0) in gaudi2_config_stm()
2030 WREG32(base_reg + mmSTM_STMSYNCR_OFFSET, 0x7FF); in gaudi2_config_stm()
2031 WREG32(base_reg + mmSTM_STMTCSR_OFFSET, 0x27 | (input->id << 16)); in gaudi2_config_stm()
2034 WREG32(base_reg + mmSTM_STMHEMCR_OFFSET, 0); in gaudi2_config_stm()
2036 WREG32(base_reg + mmSTM_STMHEER_OFFSET, 0); in gaudi2_config_stm()
2037 WREG32(base_reg + mmSTM_STMHETER_OFFSET, 0); in gaudi2_config_stm()
2038 WREG32(base_reg + mmSTM_STMHEBSR_OFFSET, 0); in gaudi2_config_stm()
2039 WREG32(base_reg + mmSTM_STMSPTER_OFFSET, 0); in gaudi2_config_stm()
2040 WREG32(base_reg + mmSTM_STMSPER_OFFSET, 0); in gaudi2_config_stm()
2041 WREG32(base_reg + mmSTM_STMHEMASTR_OFFSET, 0x80); in gaudi2_config_stm()
2042 WREG32(base_reg + mmSTM_STMSPTRIGCSR_OFFSET, 0); in gaudi2_config_stm()
2043 WREG32(base_reg + mmSTM_STMSPSCR_OFFSET, 0); in gaudi2_config_stm()
2044 WREG32(base_reg + mmSTM_STMSPMSCR_OFFSET, 0); in gaudi2_config_stm()
2045 WREG32(base_reg + mmSTM_STMTSFREQR_OFFSET, 0); in gaudi2_config_stm()
2056 return 0; in gaudi2_config_stm()
2075 * in case base reg is 0x0 we ignore this configuration in gaudi2_config_etf()
2078 return 0; in gaudi2_config_etf()
2083 * it is not return 0x0 - in case it does in gaudi2_config_etf()
2084 * it means that this is stub, we ignore this and return 0 in gaudi2_config_etf()
2088 if (hdev->pldm && read_reg == 0x0) in gaudi2_config_etf()
2089 return 0; in gaudi2_config_etf()
2097 if ((!params->enable && val == 0x0) || (params->enable && val != 0x0)) in gaudi2_config_etf()
2098 return 0; in gaudi2_config_etf()
2101 val |= 0x1000; in gaudi2_config_etf()
2103 val |= 0x40; in gaudi2_config_etf()
2120 WREG32(base_reg + mmETF_CTL_OFFSET, 0); in gaudi2_config_etf()
2133 WREG32(base_reg + mmETF_PSCR_OFFSET, 0x10); in gaudi2_config_etf()
2136 WREG32(base_reg + mmETF_BUFWM_OFFSET, 0x3FFC); in gaudi2_config_etf()
2138 WREG32(base_reg + mmETF_FFCR_OFFSET, 0x4001); in gaudi2_config_etf()
2141 WREG32(base_reg + mmETF_BUFWM_OFFSET, 0); in gaudi2_config_etf()
2142 WREG32(base_reg + mmETF_MODE_OFFSET, 0); in gaudi2_config_etf()
2143 WREG32(base_reg + mmETF_FFCR_OFFSET, 0); in gaudi2_config_etf()
2146 return 0; in gaudi2_config_etf()
2206 if ((!params->enable && val == 0x0) || (params->enable && val != 0x0)) in gaudi2_config_etr()
2207 return 0; in gaudi2_config_etr()
2210 val |= 0x1000; in gaudi2_config_etr()
2212 val |= 0x40; in gaudi2_config_etr()
2229 WREG32(mmPSOC_ETR_CTL, 0); in gaudi2_config_etr()
2237 if (input->buffer_size == 0) { in gaudi2_config_etr()
2238 dev_err(hdev->dev, "ETR buffer size should be bigger than 0\n"); in gaudi2_config_etr()
2253 WREG32(mmPSOC_ETR_BUFWM, 0x3FFC); in gaudi2_config_etr()
2259 val = FIELD_PREP(PSOC_ETR_AXICTL_PROTCTRLBIT0_MASK, 0); in gaudi2_config_etr()
2263 val |= FIELD_PREP(PSOC_ETR_AXICTL_WRBURSTLEN_MASK, 0xF); in gaudi2_config_etr()
2269 WREG32(mmPSOC_ETR_PSCR, 0x10); in gaudi2_config_etr()
2272 WREG32(mmPSOC_ETR_BUFWM, 0); in gaudi2_config_etr()
2273 WREG32(mmPSOC_ETR_RSZ, 0x400); in gaudi2_config_etr()
2274 WREG32(mmPSOC_ETR_DBALO, 0); in gaudi2_config_etr()
2275 WREG32(mmPSOC_ETR_DBAHI, 0); in gaudi2_config_etr()
2276 WREG32(mmPSOC_ETR_PSCR, 0); in gaudi2_config_etr()
2277 WREG32(mmPSOC_ETR_MODE, 0); in gaudi2_config_etr()
2278 WREG32(mmPSOC_ETR_FFCR, 0); in gaudi2_config_etr()
2291 rwphi = RREG32(mmPSOC_ETR_RWPHI) & 0xff; in gaudi2_config_etr()
2297 return 0; in gaudi2_config_etr()
2303 u32 val = params->enable ? 0xFFF : 0; in gaudi2_config_funnel()
2305 int rc = 0; in gaudi2_config_funnel()
2315 * in case base reg is 0x0 we ignore this configuration in gaudi2_config_funnel()
2318 return 0; in gaudi2_config_funnel()
2323 * in case return 0x0 - it means that this is stub, in gaudi2_config_funnel()
2324 * we ignore this and return 0 - means success in gaudi2_config_funnel()
2327 if (hdev->pldm && read_reg == 0x0) in gaudi2_config_funnel()
2328 return 0; in gaudi2_config_funnel()
2336 return 0; in gaudi2_config_funnel()
2353 * in case base reg is 0x0 we ignore this configuration in gaudi2_config_bmon()
2356 return 0; in gaudi2_config_bmon()
2360 * for doing do need to read Control Register (offset 0x0) and check in gaudi2_config_bmon()
2361 * it is not return 0x0 - in case it does in gaudi2_config_bmon()
2362 * it means that this is stub, we ignore this and return 0 in gaudi2_config_bmon()
2366 if (hdev->pldm && read_reg == 0x0) in gaudi2_config_bmon()
2367 return 0; in gaudi2_config_bmon()
2376 WREG32(base_reg + mmBMON_RESET_OFFSET, 0x1); in gaudi2_config_bmon()
2401 WREG32(base_reg + mmBMON_IDL_OFFSET, 0x0); in gaudi2_config_bmon()
2402 WREG32(base_reg + mmBMON_IDH_OFFSET, 0x0); in gaudi2_config_bmon()
2404 WREG32(base_reg + mmBMON_ATTREN_OFFSET, 0); in gaudi2_config_bmon()
2407 WREG32(base_reg + mmBMON_REDUCTION_OFFSET, 0x1 | (13 << 8)); in gaudi2_config_bmon()
2408 WREG32(base_reg + mmBMON_STM_TRC_OFFSET, 0x7 | (input->id << 8)); in gaudi2_config_bmon()
2411 WREG32(base_reg + mmBMON_ADDRL_S0_OFFSET, 0); in gaudi2_config_bmon()
2412 WREG32(base_reg + mmBMON_ADDRH_S0_OFFSET, 0); in gaudi2_config_bmon()
2413 WREG32(base_reg + mmBMON_ADDRL_E0_OFFSET, 0); in gaudi2_config_bmon()
2414 WREG32(base_reg + mmBMON_ADDRH_E0_OFFSET, 0); in gaudi2_config_bmon()
2415 WREG32(base_reg + mmBMON_ADDRL_S1_OFFSET, 0); in gaudi2_config_bmon()
2416 WREG32(base_reg + mmBMON_ADDRH_S1_OFFSET, 0); in gaudi2_config_bmon()
2417 WREG32(base_reg + mmBMON_ADDRL_E1_OFFSET, 0); in gaudi2_config_bmon()
2418 WREG32(base_reg + mmBMON_ADDRH_E1_OFFSET, 0); in gaudi2_config_bmon()
2419 WREG32(base_reg + mmBMON_ADDRL_S2_OFFSET, 0); in gaudi2_config_bmon()
2420 WREG32(base_reg + mmBMON_ADDRH_S2_OFFSET, 0); in gaudi2_config_bmon()
2421 WREG32(base_reg + mmBMON_ADDRL_E2_OFFSET, 0); in gaudi2_config_bmon()
2422 WREG32(base_reg + mmBMON_ADDRH_E2_OFFSET, 0); in gaudi2_config_bmon()
2423 WREG32(base_reg + mmBMON_ADDRL_S3_OFFSET, 0); in gaudi2_config_bmon()
2424 WREG32(base_reg + mmBMON_ADDRH_S3_OFFSET, 0); in gaudi2_config_bmon()
2425 WREG32(base_reg + mmBMON_ADDRL_E3_OFFSET, 0); in gaudi2_config_bmon()
2426 WREG32(base_reg + mmBMON_ADDRH_E3_OFFSET, 0); in gaudi2_config_bmon()
2427 WREG32(base_reg + mmBMON_REDUCTION_OFFSET, 0); in gaudi2_config_bmon()
2428 WREG32(base_reg + mmBMON_STM_TRC_OFFSET, 0x7 | (0xA << 8)); in gaudi2_config_bmon()
2429 WREG32(base_reg + mmBMON_CR_OFFSET, 0x77 | 0xf << 24); in gaudi2_config_bmon()
2432 return 0; in gaudi2_config_bmon()
2456 * in case base reg is 0x0 we ignore this configuration in gaudi2_config_spmu()
2459 return 0; in gaudi2_config_spmu()
2462 * for doing do need to read PMTRC (at offset 0x200) in gaudi2_config_spmu()
2463 * address and check if return value is 0x0 - in case it does in gaudi2_config_spmu()
2464 * it means that this is stub, we ignore this and return 0 in gaudi2_config_spmu()
2468 if (hdev->pldm && read_reg == 0x0) in gaudi2_config_spmu()
2469 return 0; in gaudi2_config_spmu()
2482 WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013046); in gaudi2_config_spmu()
2483 WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013040); in gaudi2_config_spmu()
2489 for (i = 0 ; i < input->event_types_num ; i++) in gaudi2_config_spmu()
2497 WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013041); in gaudi2_config_spmu()
2502 event_mask = 0x80000000; in gaudi2_config_spmu()
2504 event_mask |= GENMASK(input->event_types_num - 1, 0); in gaudi2_config_spmu()
2514 WREG32(base_reg + mmSPMU_PMCR_EL0_OFFSET, 0x41013040); in gaudi2_config_spmu()
2523 for (i = 0 ; i < events_num ; i++) { in gaudi2_config_spmu()
2536 WREG32(base_reg + mmSPMU_PMOVSSET_EL0_OFFSET, 0); in gaudi2_config_spmu()
2539 WREG32(base_reg + mmSPMU_PMTRC_OFFSET, 0x100400); in gaudi2_config_spmu()
2542 return 0; in gaudi2_config_spmu()
2548 int rc = 0; in gaudi2_debug_coresight()
2604 u32 component_idx = 0; in gaudi2_coresight_set_disabled_components()
2610 return 0; in gaudi2_coresight_set_disabled_components()
2612 full_mask = GENMASK(unit_count - 1, 0); in gaudi2_coresight_set_disabled_components()
2627 * in case mask is set, driver need to set to 0x0 in gaudi2_coresight_set_disabled_components()
2644 debug_funnel_regs[binned_component->funnel_id] = 0x0; in gaudi2_coresight_set_disabled_components()
2647 debug_etf_regs[binned_component->etf_id] = 0x0; in gaudi2_coresight_set_disabled_components()
2650 debug_stm_regs[binned_component->stm_id] = 0x0; in gaudi2_coresight_set_disabled_components()
2653 debug_spmu_regs[binned_component->spmu_id] = 0x0; in gaudi2_coresight_set_disabled_components()
2655 for (bmon_idx = 0; bmon_idx < binned_component->bmon_count; bmon_idx++) in gaudi2_coresight_set_disabled_components()
2656 debug_bmon_regs[binned_component->bmon_ids[bmon_idx]] = 0x0; in gaudi2_coresight_set_disabled_components()
2667 return 0; in gaudi2_coresight_set_disabled_components()
2678 * driver will ignore programming it ( happens when offset value is set to 0x0 ) in gaudi2_coresight_init()
2737 return 0; in gaudi2_coresight_init()