Lines Matching refs:CFG_BASE

576 	prop->cfg_base_address = CFG_BASE;  in gaudi_set_fixed_properties()
664 prop->pcie_aux_dbi_reg_addr = CFG_BASE + mmPCIE_AUX_DBI; in gaudi_set_fixed_properties()
721 (CFG_BASE - SPI_FLASH_BASE_ADDR); in gaudi_pci_bars_map()
850 rc = hl_pci_elbi_read(hdev, CFG_BASE + mmCPU_BOOT_DEV_STS0, in gaudi_early_init()
1814 region->region_base = CFG_BASE; in gaudi_set_pci_memory_regions()
1816 region->offset_in_bar = CFG_BASE - SPI_FLASH_BASE_ADDR; in gaudi_set_pci_memory_regions()
2557 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2559 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2561 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2563 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2565 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2567 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2569 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2571 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_pci_dma_qman()
2615 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2617 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_pci_dma_qman()
2662 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2664 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_dma_core()
2737 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2739 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2741 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2743 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2745 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2747 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2749 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2751 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_hbm_dma_qman()
2793 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
2795 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_hbm_dma_qman()
2878 mtr_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2880 mtr_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2882 so_base_lo = lower_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2884 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_mme_qman()
2929 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
2931 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_mme_qman()
3003 mtr_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3005 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3007 so_base_en_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3009 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3011 mtr_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3013 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3015 so_base_ws_lo = lower_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3017 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qman()
3062 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3064 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_tpc_qman()
3112 so_base_hi = upper_32_bits(CFG_BASE + in gaudi_init_tpc_qmans()
3154 mtr_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3156 mtr_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3158 so_base_en_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3160 so_base_en_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3162 mtr_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3164 mtr_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3166 so_base_ws_lo = lower_32_bits((CFG_BASE & U32_MAX) + in gaudi_init_nic_qman()
3168 so_base_ws_hi = upper_32_bits(CFG_BASE + in gaudi_init_nic_qman()
3212 lower_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3214 upper_32_bits(CFG_BASE + irq_handler_offset)); in gaudi_init_nic_qman()
3585 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_enable_timestamp()
3588 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0xC, 0); in gaudi_enable_timestamp()
3589 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE + 0x8, 0); in gaudi_enable_timestamp()
3592 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 1); in gaudi_enable_timestamp()
3598 WREG32(mmPSOC_TIMESTAMP_BASE - CFG_BASE, 0); in gaudi_disable_timestamp()
5554 cq_pkt->addr = cpu_to_le64(CFG_BASE + msi_addr); in gaudi_add_end_of_cb_packets()
5710 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5718 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5726 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_SOB_OBJ_0; in gaudi_restore_sm_registers()
5734 base_addr = CFG_BASE + mmSYNC_MNGR_E_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5742 base_addr = CFG_BASE + mmSYNC_MNGR_E_S_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5750 base_addr = CFG_BASE + mmSYNC_MNGR_W_N_SYNC_MNGR_OBJS_MON_STATUS_0; in gaudi_restore_sm_registers()
5758 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_SOB_OBJ_0 + in gaudi_restore_sm_registers()
5767 base_addr = CFG_BASE + mmSYNC_MNGR_W_S_SYNC_MNGR_OBJS_MON_STATUS_0 + in gaudi_restore_sm_registers()
5786 u64 sob_addr = CFG_BASE + in gaudi_restore_dma_registers()
6719 if (params->block_address >= CFG_BASE) in gaudi_extract_ecc_info()
6720 params->block_address -= CFG_BASE; in gaudi_extract_ecc_info()
8219 lower_32_bits(CFG_BASE + in gaudi_run_tpc_kernel()
8677 *addr = CFG_BASE + offset; in gaudi_get_fence_addr()
8824 reg_value -= lower_32_bits(CFG_BASE); in gaudi_add_sync_to_engine_map_entry()
9004 fence_cnt = base_offset + CFG_BASE + in gaudi_print_fences_single_engine()