60 	u64 hop_addr[MMU_ARCH_6_HOPS] = { 0 }, hop_pte_addr[MMU_ARCH_6_HOPS] = { 0 }, curr_pte,  in hl_mmu_v2_unmap()  local
78 	hop_addr[0] = hl_mmu_dr_get_hop0_addr(ctx);  in hl_mmu_v2_unmap()
80 					hop_addr[0], scrambled_virt_addr);  in hl_mmu_v2_unmap()
87 		hop_addr[i] = hl_mmu_get_next_hop_addr(ctx, curr_pte);  in hl_mmu_v2_unmap()
88 		if (hop_addr[i] == ULLONG_MAX)  in hl_mmu_v2_unmap()
92 					hop_addr[i], scrambled_virt_addr);  in hl_mmu_v2_unmap()
115 		if (hl_mmu_dr_put_pte(ctx, hop_addr[i]))  in hl_mmu_v2_unmap()
133 	u64 hop_addr[MMU_ARCH_6_HOPS] = { 0 }, hop_pte_addr[MMU_ARCH_6_HOPS] = { 0 },  in hl_mmu_v2_map()  local
153 	hop_addr[0] = hl_mmu_dr_get_hop0_addr(ctx);  in hl_mmu_v2_map()
155 						hop_addr[0], scrambled_virt_addr);  in hl_mmu_v2_map()
160 		hop_addr[i] = hl_mmu_dr_get_alloc_next_hop_addr(ctx, curr_pte, &hop_new[i]);  in hl_mmu_v2_map()
161 		if (hop_addr[i] == ULLONG_MAX) {  in hl_mmu_v2_map()
167 					hop_addr[i], scrambled_virt_addr);  in hl_mmu_v2_map()
204 			curr_pte = (hop_addr[i] & HOP_PHYS_ADDR_MASK) | PAGE_PRESENT_MASK;  in hl_mmu_v2_map()
208 				hl_mmu_dr_get_pte(ctx, hop_addr[i - 1]);  in hl_mmu_v2_map()
211 	hl_mmu_dr_get_pte(ctx, hop_addr[hop_last]);  in hl_mmu_v2_map()
217 		if (hop_new[i] && (hop_addr[i] != U64_MAX))  in hl_mmu_v2_map()
218 			hl_mmu_dr_free_hop(ctx, hop_addr[i]);  in hl_mmu_v2_map()
266 	hops->hop_info[0].hop_addr = hl_mmu_dr_get_phys_hop0_addr(ctx);  in hl_mmu_v2_get_tlb_info()
268 						hops->hop_info[0].hop_addr,  in hl_mmu_v2_get_tlb_info()
279 		hops->hop_info[i].hop_addr =  in hl_mmu_v2_get_tlb_info()
281 		if (hops->hop_info[i].hop_addr == ULLONG_MAX)  in hl_mmu_v2_get_tlb_info()
286 						hops->hop_info[i].hop_addr,  in hl_mmu_v2_get_tlb_info()