xtensa/kernel/entry.S

2  * Low-level exception handling
8  * Copyright (C) 2004 - 2008 by Tensilica Inc.
17 #include <asm/asm-offsets.h>
22 #include <asm/asm-uaccess.h>
29 #include <variant/tie-asm.h>
34  * 100....0 -> 1
35  * 010....0 -> 2
36  * 000....1 -> WSBITS
42 	nsau    \bit, \mask			# 32-WSBITS ... 31 (32 iff 0)
43 	addi    \bit, \bit, WSBITS - 32 + 1   	# uppest bit set -> return 1
48 	addi    \bit, \bit, -16
53 	addi    \bit, \bit, -8
57 	addi    \bit, \bit, -4
60 	addi    \bit, \bit, -2
63 	addi    \bit, \bit, -1
90 /* ----------------- DEFAULT FIRST LEVEL EXCEPTION HANDLERS ----------------- */
93  * First-level exception handler for user exceptions.
97  * We save SAR (used to calculate WMASK), and WB and WS (we don't have to
114  *   a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
135 	/* Save SAR and turn off single stepping */
139 	rsr	a3, sar
158 	slli	a2, a3, 32-WSBITS
160 	srli	a2, a2, 32-WSBITS
201 	addi	a3, a2, -1		# eliminate '1' in bit 0: yyyyxxww0
202 	neg	a3, a3			# yyyyxxww0 -> YYYYXXWW1+1
211 	 * bits 4...: number of valid 4-register frames
217 	s32i	a2, a1, PT_WMASK	# needed when we restore the reg-file
219 	/* Save 4 registers at a time */
221 1:	rotw	-1
222 	s32i	a0, a5, PT_AREG_END - 16
223 	s32i	a1, a5, PT_AREG_END - 12
224 	s32i	a2, a5, PT_AREG_END - 8
225 	s32i	a3, a5, PT_AREG_END - 4
226 	addi	a0, a4, -1
227 	addi	a1, a5, -16
230 	/* WINDOWBASE still in SAR! */
232 	rsr	a2, sar			# original WINDOWBASE
249  * First-level exit handler for kernel exceptions
269  *   a0-a3 and depc have been saved to PT_AREG0...PT_AREG3 and PT_DEPC
289 	/* Save SAR and turn off single stepping */
292 	rsr	a3, sar
304 	slli	a2, a3, 32-WSBITS
306 	srli	a2, a2, 32-WSBITS
310 	/* Save only the live window-frame */
335 	s32e	a3, a1, -16
336 	s32e	a0, a1, -12
347  * to the second-level exception handler.
396 	 * - in case of exception or level-1 interrupt it's in the PS,
398 	 * - in case of medium level interrupt it's in the excsave2.
404 	beqz	a3, .Llevel1_irq	# level-1 IRQ sets ps.intlevel to 0
408 	s32i	a0, a1, PT_PS		# save medium-level interrupt ps
418 	addi	a2, a2, -EXCCAUSE_LEVEL1_INTERRUPT
465 	/* Go to second-level dispatcher. Set up parameters to pass to the
475 	/* Call the second-level handler */
538 	/* Check current_thread_info->preempt_count */
595 	ssr	a2			# preserve user's WB in the SAR
600 	rotw	-1			# we restore a4..a7
613 1:	rotw	-1			# a0..a3 become a4..a7
614 	addi	a3, a7, -4*4		# next iteration
615 	addi	a2, a6, -16		# decrementing Y in WMASK
622 	/* Clear unrestored registers (don't leak anything to user-land */
626 	rsr	a3, sar
631 1:	rotw	-1
632 	addi	a3, a7, -1
642 	 *	 (if we have restored WSBITS-1 frames).
665 	 * We only have to do a movsp if the previous window-frame has
668 	 * WINDOWSTART for the previous window-frame was set before
672 	 * 'and' WINDOWSTART and WINDOWSTART-1:
674 	 *  (XXXXXX1[0]* - 1) AND XXXXXX1[0]* = XXXXXX0[0]*
680 	 *        different from the time the exception occurred.)
693 	addi	a0, a3, -1
699 	addi    a0, a1, -16
739 	/* Restore PC, SAR */
744 	wsr	a3, sar
759 	movi	a3, -2
816 	addi	a2, a1, -16 - PT_KERNEL_SIZE	# assume kernel stack
856 	 * breakpoints, single-step faulting instruction and restore data
917  *   - a0 contains the caller address; original value saved in excsave1.
918  *   - the original a0 contains a valid return address (backtrace) or 0.
919  *   - a2 contains a valid stackpointer
923  *   - If the stack pointer could be invalid, the caller has to setup a
926  *   - If the return address could be invalid, the caller has to set it
962 /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */
969  * Fast-handler for alloca exceptions
976  *    /home/ross/rtos/porting/XtensaRTOS-PortingLayer-20090507/xtensa_vectors.S
988  * will be re-executed and this time since the next window frames is in the
1010 	rotw	-1
1024 	rotw	-1
1026 	rotw	-1
1104 	rsr	a0, depc			# get syscall-nr
1135  *   a0:	a2 (syscall-nr), original value saved on stack (PT_AREG0)
1164 .Lswp:	/* Atomic compare and swap */
1182 	addi	a6, a6, -SYS_XTENSA_ATOMIC_SET
1196 	movi	a2, -EFAULT
1201 	movi	a2, -EINVAL
1211 	movi	a2, -ENOSYS
1247 	/* Save a3, a4 and SAR on stack. */
1249 	rsr	a0, sar
1277 	extui	a3, a3, 1, WSBITS-1	# a3 = 0yyxxxwww
1278 	movi	a0, (1 << (WSBITS-1))
1285 	/* Skip empty frames - get 'oldest' WINDOWSTART-bit. */
1293 	sub	a0, a3, a0		# WSBITS-a0:number of 0-bits from right
1294 	ssr	a0			# save in SAR for later.
1306 	   and WS differ by one 4-register frame. */
1316 .Lc8:	s32e	a4, a13, -16
1317 	l32e	a4, a5, -12
1318 	s32e	a8, a4, -32
1319 	s32e	a5, a13, -12
1320 	s32e	a6, a13, -8
1321 	s32e	a7, a13, -4
1322 	s32e	a9, a4, -28
1323 	s32e	a10, a4, -24
1324 	s32e	a11, a4, -20
1330 .Lc4:	s32e	a4, a9, -16
1331 	s32e	a5, a9, -12
1332 	s32e	a6, a9, -8
1333 	s32e	a7, a9, -4
1342 	/* 12-register frame (call12) */
1344 	l32e	a0, a5, -12
1345 	s32e	a8, a0, -48
1348 	s32e	a9, a8, -44
1349 	s32e	a10, a8, -40
1350 	s32e	a11, a8, -36
1351 	s32e	a12, a8, -32
1352 	s32e	a13, a8, -28
1353 	s32e	a14, a8, -24
1354 	s32e	a15, a8, -20
1362 	 * s32e	a0, a13, -16
1369 	rotw	-1
1371 	s32e	a4, a8, -16
1372 	s32e	a5, a8, -12
1373 	s32e	a6, a8, -8
1374 	s32e	a7, a8, -4
1393 	/* Advance PC, restore registers and SAR, and return from exception. */
1397 	wsr	a3, sar
1457  * frame for the current windowbase - 1, we need to rotate a3 left by the
1469 	ssl	a2		# set shift (32 - WB)
1471 	/* We need to make sure the current registers (a0-a3) are preserved.
1480 	xsr	a3, excsave1	# get spill-mask
1484 	slli	a2, a3, 32-WSBITS
1519 	addi	a2, a2, -PT_USER_SIZE
1554 	/* Load WB at the time the exception occurred. */
1556 	rsr	a3, sar			# WB is still in SAR
1573 	movi	a2, -ENOSYS
1593 /* First-level entry handler for user, kernel, and double 2nd-level
1597  * An old, less-efficient C version of this function used to exist.
1621 	 * the pointer to that page.  Also, it's possible for tsk->mm
1622 	 * to be NULL while tsk->active_mm is nonzero if we faulted on
1626 	 * http://mail.nl.linux.org/linux-mm/2002-08/msg00258.html
1630 	 *		mm = tsk->active_mm;
1631 	 *	pgd = pgd_offset (mm, regs->excvaddr);
1632 	 *	pmd = pmd_offset (pgd, regs->excvaddr);
1637 	l32i	a0, a1, TASK_MM		# tsk->mm
1646 	/* Read ptevaddr and convert to top of page-table page.
1656 	 * pteval = ((pmdval - PAGE_OFFSET + PHYS_OFFSET) & PAGE_MASK)
1660 	movi	a1, (PHYS_OFFSET - PAGE_OFFSET) & 0xffffffff
1661 	add	a0, a0, a1		# pmdval - PAGE_OFFSET
1669 	 * We utilize all three wired-ways (7-9) to hold pmd translations.
1673 	 *  0,1 -> way 7	program (0040.0000) and virtual (c000.0000)
1674 	 *  2   -> way 8	shared libaries (2000.0000)
1675 	 *  3   -> way 0	stack (3000.0000)
1680 	addx2	a3, a3, a3		# ->			0,3,6,9
1682 	extui	a3, a3, 2, 2		# ->			0,0,1,2
1734 	 * by another task. Re-establish temporary mapping to the
1757 	addi	a1, a0, -TLBTEMP_SIZE
1835 	l32i	a0, a1, TASK_MM		# tsk->mm
1938 	/* regs->syscall = regs->areg[2] */
1959 	movi	abi_rv, -ENOSYS
1965 	/* Load args: arg0 - arg5 are passed via regs. */
1976 1:	/* regs->areg[2] = return_value */
2017 	.rept	(XCHAL_NUM_AREGS - 32) / 12
2067 	s32i	a0, a10, THREAD_RA - TASK_THREAD	# save return address
2068 	s32i	a1, a10, THREAD_SP - TASK_THREAD	# save stack pointer