boot/dts/xtfpga.dtsi

1 // SPDX-License-Identifier: GPL-2.0
3 	compatible = "cdns,xtensa-xtfpga";
4 	#address-cells = <1>;
5 	#size-cells = <1>;
6 	interrupt-parent = <&pic>;
18 		#address-cells = <1>;
19 		#size-cells = <0>;
21 			compatible = "cdns,xtensa-cpu";
28 		compatible = "cdns,xtensa-pic";
33 		#interrupt-cells = <2>;
34 		interrupt-controller;
39 			#clock-cells = <0>;
40 			compatible = "fixed-clock";
41 			clock-frequency = <54000000>;
46 		#address-cells = <1>;
47 		#size-cells = <1>;
48 		compatible = "simple-bus";
51 		osc: main-oscillator {
52 			#clock-cells = <0>;
53 			compatible = "cdns,xtfpga-clock";
60 			no-loopback-test;
62 			reg-shift = <2>;
63 			reg-io-width = <4>;
64 			native-endian;
72 			native-endian;
74 			local-mac-address = [00 50 c2 13 6f 00];
78 		i2s0: xtfpga-i2s@0d080000 {
79 			#sound-dai-cells = <0>;
80 			compatible = "cdns,xtfpga-i2s";
86 		i2c0: i2c-master@0d090000 {
87 			compatible = "opencores,i2c-ocores";
88 			#address-cells = <1>;
89 			#size-cells = <0>;
91 			reg-shift = <2>;
92 			reg-io-width = <4>;
93 			native-endian;
97 			cdce706: clock-synth@69 {
99 				#clock-cells = <1>;
102 				clock-names = "clk_in0";
107 			compatible = "cdns,xtfpga-spi";
108 			#address-cells = <1>;
109 			#size-cells = <0>;
112 			tlv320aic23: sound-codec@0 {
113 				#sound-dai-cells = <0>;
116 				spi-max-frequency = <12500000>;
122 		compatible = "simple-audio-card";
123 		simple-audio-card,format = "i2s";
124 		simple-audio-card,mclk-fs = <256>;
126 		simple-audio-card,cpu {
127 			sound-dai = <&i2s0>;
130 		simple-audio-card,codec {
131 			sound-dai = <&tlv320aic23>;
132 			simple-audio-card,bitclock-master = <0>;
133 			simple-audio-card,frame-master = <0>;