27 static void uv_program_mmr(struct irq_cfg *cfg, struct uv_irq_2_mmr_pnode *info)  in uv_program_mmr()  argument
37 	entry->vector		= cfg->vector;  in uv_program_mmr()
38 	entry->delivery_mode	= APIC_DELIVERY_MODE_FIXED;  in uv_program_mmr()
39 	entry->dest_mode	= apic->dest_mode_logical;  in uv_program_mmr()
40 	entry->polarity		= 0;  in uv_program_mmr()
41 	entry->trigger		= 0;  in uv_program_mmr()
42 	entry->mask		= 0;  in uv_program_mmr()
43 	entry->dest		= cfg->dest_apicid;  in uv_program_mmr()
45 	uv_write_global_mmr64(info->pnode, info->offset, mmr_value);  in uv_program_mmr()
54 	struct irq_data *parent = data->parent_data;  in uv_set_irq_affinity()
55 	struct irq_cfg *cfg = irqd_cfg(data);  in uv_set_irq_affinity()  local
58 	ret = parent->chip->irq_set_affinity(parent, mask, force);  in uv_set_irq_affinity()
60 		uv_program_mmr(cfg, data->chip_data);  in uv_set_irq_affinity()
61 		vector_schedule_cleanup(cfg);  in uv_set_irq_affinity()
68 	.name			= "UV-CORE",
83 	if (nr_irqs > 1 || !info || info->type != X86_IRQ_ALLOC_TYPE_UV)  in uv_domain_alloc()
84 		return -EINVAL;  in uv_domain_alloc()
89 		return -ENOMEM;  in uv_domain_alloc()
93 		if (info->uv.limit == UV_AFFINITY_CPU)  in uv_domain_alloc()
98 		chip_data->pnode = uv_blade_to_pnode(info->uv.blade);  in uv_domain_alloc()
99 		chip_data->offset = info->uv.offset;  in uv_domain_alloc()
101 				    handle_percpu_irq, NULL, info->uv.name);  in uv_domain_alloc()
115 	kfree(irq_data->chip_data);  in uv_domain_free()
122  * Re-target the irq to the specified CPU and enable the specified MMR located
123  * on the specified blade to allow the sending of MSIs to the specified CPU.
128 	uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data);  in uv_domain_activate()
144 	entry->mask = 1;  in uv_domain_deactivate()
145 	uv_program_mmr(irqd_cfg(irq_data), irq_data->chip_data);  in uv_domain_deactivate()
165 	fn = irq_domain_alloc_named_fwnode("UV-CORE");  in uv_get_irq_domain()
181  * MMR that defines the MSI that is to be sent to the specified CPU when an
184 int uv_setup_irq(char *irq_name, int cpu, int mmr_blade,  in uv_setup_irq()  argument
191 		return -ENOMEM;  in uv_setup_irq()
193 	init_irq_alloc_info(&info, cpumask_of(cpu));  in uv_setup_irq()
207  * defined the MSI that was to be sent to the specified CPU when an interrupt