Lines Matching +full:1 +full:- +full:2
1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "intel,ce4100-cp";
32 ioapic1: interrupt-controller@fec00000 {
33 #interrupt-cells = <2>;
34 compatible = "intel,ce4100-ioapic";
35 interrupt-controller;
40 compatible = "intel,ce4100-hpet";
44 lapic0: interrupt-controller@fee00000 {
45 compatible = "intel,ce4100-lapic";
50 #address-cells = <3>;
51 #size-cells = <2>;
52 compatible = "intel,ce4100-pci", "pci";
54 bus-range = <0 0>;
59 /* Secondary IO-APIC */
60 ioapic2: interrupt-controller@0,1 {
61 #interrupt-cells = <2>;
62 compatible = "intel,ce4100-ioapic";
63 interrupt-controller;
65 assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
68 pci@1,0 {
69 #address-cells = <3>;
70 #size-cells = <2>;
71 compatible = "intel,ce4100-pci", "pci";
73 bus-range = <1 1>;
77 interrupt-parent = <&ioapic2>;
79 display@2,0 {
80 compatible = "pci8086,2e5b.2",
81 "pci8086,2e5b",
86 interrupts = <0 1>;
90 compatible = "pci8086,2e5c.2",
91 "pci8086,2e5c",
96 interrupts = <2 1>;
100 compatible = "pci8086,2e5d.2",
101 "pci8086,2e5d",
106 interrupts = <4 1>;
109 multimedia@4,1 {
110 compatible = "pci8086,2e5e.2",
111 "pci8086,2e5e",
116 interrupts = <5 1>;
120 compatible = "pci8086,2e5f.2",
121 "pci8086,2e5f",
126 interrupts = <6 1>;
129 sound@6,1 {
130 compatible = "pci8086,2e5f.2",
131 "pci8086,2e5f",
136 interrupts = <7 1>;
139 sound@6,2 {
140 compatible = "pci8086,2e60.2",
141 "pci8086,2e60",
146 interrupts = <8 1>;
150 compatible = "pci8086,2e61.2",
151 "pci8086,2e61",
156 interrupts = <9 1>;
159 display@8,1 {
160 compatible = "pci8086,2e62.2",
161 "pci8086,2e62",
166 interrupts = <10 1>;
169 multimedia@8,2 {
170 compatible = "pci8086,2e63.2",
171 "pci8086,2e63",
176 interrupts = <11 1>;
179 entertainment-encryption@9,0 {
180 compatible = "pci8086,2e64.2",
181 "pci8086,2e64",
186 interrupts = <12 1>;
190 compatible = "pci8086,2e65.2",
191 "pci8086,2e65",
199 compatible = "pci8086,2e66.2",
200 "pci8086,2e66",
205 interrupts = <14 1>;
208 pcigpio: gpio@b,1 {
209 #gpio-cells = <2>;
210 #interrupt-cells = <2>;
211 compatible = "pci8086,2e67.2",
212 "pci8086,2e67",
217 interrupts = <15 1>;
218 interrupt-controller;
219 gpio-controller;
223 i2c-controller@b,2 {
224 #address-cells = <2>;
225 #size-cells = <1>;
226 compatible = "pci8086,2e68.2",
227 "pci8086,2e68",
232 interrupts = <16 1>;
234 1 0 0x02000000 0 0xdffe0600 0x100
235 2 0 0x02000000 0 0xdffe0700 0x100>;
238 #address-cells = <1>;
239 #size-cells = <0>;
240 compatible = "intel,ce4100-i2c-controller";
244 i2c@1 {
245 #address-cells = <1>;
246 #size-cells = <0>;
247 compatible = "intel,ce4100-i2c-controller";
248 reg = <1 0 0x100>;
251 #gpio-cells = <2>;
254 gpio-controller;
258 i2c@2 {
259 #address-cells = <1>;
260 #size-cells = <0>;
261 compatible = "intel,ce4100-i2c-controller";
262 reg = <2 0 0x100>;
265 #gpio-cells = <2>;
268 gpio-controller;
273 smard-card@b,3 {
274 compatible = "pci8086,2e69.2",
275 "pci8086,2e69",
280 interrupts = <15 1>;
283 spi-controller@b,4 {
284 #address-cells = <1>;
285 #size-cells = <0>;
287 "pci8086,2e6a.2",
288 "pci8086,2e6a",
293 interrupts = <15 1>;
298 spi-max-frequency = <115200>;
301 dac@1 {
303 reg = <1>;
304 spi-max-frequency = <115200>;
307 eeprom@2 {
309 reg = <2>;
310 spi-max-frequency = <115200>;
315 compatible = "pci8086,2e6d.2",
316 "pci8086,2e6d",
324 compatible = "pci8086,2e6e.2",
325 "pci8086,2e6e",
330 interrupts = <21 1>;
333 clock@c,1 {
334 compatible = "pci8086,2e6f.2",
335 "pci8086,2e6f",
340 interrupts = <3 1>;
344 compatible = "pci8086,2e70.2",
345 "pci8086,2e70",
350 interrupts = <22 1>;
353 usb@d,1 {
354 compatible = "pci8086,2e70.2",
355 "pci8086,2e70",
360 interrupts = <22 1>;
364 compatible = "pci8086,2e71.0",
365 "pci8086,2e71",
370 interrupts = <23 1>;
380 interrupts = <13 1>;
383 entertainment-encryption@10,0 {
392 co-processor@11,0 {
399 interrupts = <1 1>;
412 isa@1f,0 {
413 #address-cells = <2>;
414 #size-cells = <1>;
417 ranges = <1 0 0 0 0 0x100>;
420 compatible = "intel,ce4100-rtc", "motorola,mc146818";
422 interrupt-parent = <&ioapic1>;
423 ctrl-reg = <2>;
424 freq-reg = <0x26>;
425 reg = <1 0x70 2>;