x86/pci/irq.c

3  *	Low-Level PCI Support for PC -- Routing of Interrupts
69  *  Check passed address for the PCI IRQ Routing Table signature
91 		DBG(KERN_DEBUG "PCI: Interrupt Routing Table found at 0x%lx\n",  in pirq_check_routing_table()
99  * Handle the $IRT PCI IRQ Routing Table format used by AMI for its BCP
106  * It uses the same PCI BIOS 2.1 format for interrupt routing entries
109  * specifying the total number of interrupt routing entries allocated in
122  * follows the header instead that points to interrupt routing entries
143 	DBG(KERN_DEBUG "PCI: $IRT Interrupt Routing Table found at 0x%lx\n",  in pirq_convert_irt_table()
168  *  Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
203  *  If we have a IRQ routing table, use it to search for peer host
263  *	PIRQ routing for the M1487 ISA Bus Controller (IBC) ASIC used
269  *	INTx Routing Table Mapping Registers, available in the port I/O
343  * - bit 0 selects between INTx Routing Table Mapping Registers,
345  * - bit 3 selects the nibble within the INTx Routing Table Mapping Register,
409  * Common IRQ routing practice: nibbles in config space,
459  *	PIRQ routing for the 82374EB/82374SB EISA System Component (ESC)
545  *	PIRQ routing for the 82426EX ISA Bridge (IB) ASIC used with the
681  *	PIRQ routing for the SiS85C497 AT Bus Controller & Megacell (ATM)
755  *	PIRQ routing for SiS 85C503 router used in several SiS chipsets.
761  *	  the routing registers, particularly for the onchip devices
763  *	For all routing registers the common thing is we have one byte
773  *	Apparently there are systems implementing PCI routing table using
778  *	definition of routing registers from the SiS-5595 southbridge.
784  *	They seem to work with the current routing code. However there is
788  *	Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
802  *	IDE, ACPI and DAQ routing untouched as set by the BIOS.
809  *	Onchip routing for router rev-id 0x04 (try-and-error observation)
850  * VLSI: nibble offset 0x74 - educated guess due to routing table and
903 /* Support for AMD756 PCI IRQ Routing
1296 		printk(KERN_INFO "PCI: Using BIOS for IRQ routing\n");  in pirq_find_router()
1311 	/* Use any vendor:device provided by the routing table or try all.  */  in pirq_find_router()
1364  * Buses behind bridges are typically not listed in the PIRQ routing table.
1367  * has been reached and then use its routing information.
1415 	/* Find IRQ routing entry */  in pcibios_lookup_irq()
1423 		dev_dbg(&dev->dev, "PCI INT %c not found in routing table\n",  in pcibios_lookup_irq()
1532 				dev_info(&dev2->dev, "IRQ routing conflict: "  in pcibios_lookup_irq()
1599 		printk(KERN_INFO "%s detected - fixing broken IRQ routing\n",  in fix_broken_hp_bios_irq9()
1613 		printk(KERN_INFO "%s detected - fixing broken IRQ routing\n",  in fix_acer_tm360_irqrouting()
1672 		 * routing table  in pcibios_irq_init()
1685 		 * PCI IRQ routing is set up by pci_enable_device(), but we  in pcibios_irq_init()
1689 …printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n…  in pcibios_irq_init()