1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/range.h>
11 #include <asm/pci-direct.h>
23 	u32 bus;  member
31  * It only supports K8, Fam10h, Fam11h, and Fam15h_00h-0fh .
48 		if (info->node == node && info->link == link)  in find_pci_root_info()
66  * to the LDT Bus Number Registers found in the northbridge.
71 	unsigned bus;  in early_root_info_init()  local
81 	struct range range[RANGE_NUM];  in early_root_info_init()  local
90 		return -1;  in early_root_info_init()
98 		bus = hb_probes[i].bus;  in early_root_info_init()
100 		id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);  in early_root_info_init()
125 		reg = read_pci_config(bus, slot, 1,  in early_root_info_init()
128 		/* Check if that register is enabled for bus range */  in early_root_info_init()
152 	reg = read_pci_config(bus, slot, 0, AMD_NB_F0_NODE_ID);  in early_root_info_init()
154 	reg = read_pci_config(bus, slot, 0, AMD_NB_F0_UNIT_ID);  in early_root_info_init()
157 	memset(range, 0, sizeof(range));  in early_root_info_init()
158 	add_range(range, RANGE_NUM, 0, 0, 0xffff + 1);  in early_root_info_init()
161 		reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3));  in early_root_info_init()
166 		reg = read_pci_config(bus, slot, 1, 0xc4 + (i << 3));  in early_root_info_init()
182 		subtract_range(range, RANGE_NUM, start, end + 1);  in early_root_info_init()
184 	/* add left over io port range to def node/link, [0, 0xffff] */  in early_root_info_init()
189 			if (!range[i].end)  in early_root_info_init()
192 			update_res(info, range[i].start, range[i].end - 1,  in early_root_info_init()
197 	memset(range, 0, sizeof(range));  in early_root_info_init()
198 	/* 0xfd00000000-0xffffffffff for HT */  in early_root_info_init()
199 	end = cap_resource((0xfdULL<<32) - 1);  in early_root_info_init()
201 	add_range(range, RANGE_NUM, 0, 0, end);  in early_root_info_init()
209 		subtract_range(range, RANGE_NUM, 0, end);  in early_root_info_init()
213 	/* need to take out mmconf range */  in early_root_info_init()
216 		fam10h_mmconf_start = fam10h_mmconf->start;  in early_root_info_init()
217 		fam10h_mmconf_end = fam10h_mmconf->end;  in early_root_info_init()
218 		subtract_range(range, RANGE_NUM, fam10h_mmconf_start,  in early_root_info_init()
227 		reg = read_pci_config(bus, slot, 1, 0x80 + (i << 3));  in early_root_info_init()
233 		reg = read_pci_config(bus, slot, 1, 0x84 + (i << 3));  in early_root_info_init()
248 		 * some sick allocation would have range overlap with fam10h  in early_root_info_init()
249 		 * mmconf range, so need to update start and end.  in early_root_info_init()
262 				end = fam10h_mmconf_start - 1;  in early_root_info_init()
269 				endx = fam10h_mmconf_start - 1;  in early_root_info_init()
271 				subtract_range(range, RANGE_NUM, start,  in early_root_info_init()
289 		subtract_range(range, RANGE_NUM, start, end + 1);  in early_root_info_init()
304 		subtract_range(range, RANGE_NUM, 1ULL<<32, end);  in early_root_info_init()
308 	 * add left over mmio range to def node/link ?  in early_root_info_init()
309 	 * that is tricky, just record range in from start_min to 4G  in early_root_info_init()
314 			if (!range[i].end)  in early_root_info_init()
317 			update_res(info, cap_resource(range[i].start),  in early_root_info_init()
318 				   cap_resource(range[i].end - 1),  in early_root_info_init()
327 		busnum = info->busn.start;  in early_root_info_init()
328 		printk(KERN_DEBUG "bus: %pR on node %x link %x\n",  in early_root_info_init()
329 		       &info->busn, info->node, info->link);  in early_root_info_init()
330 		list_for_each_entry(root_res, &info->resources, list)  in early_root_info_init()
331 			printk(KERN_DEBUG "bus: %02x %pR\n",  in early_root_info_init()
332 				       busnum, &root_res->res);  in early_root_info_init()
358 		u8 bus = amd_nb_bus_dev_ranges[i].bus;  in pci_enable_pci_io_ecs()  local
363 			u32 val = read_pci_config(bus, slot, 3, 0);  in pci_enable_pci_io_ecs()
368 			val = read_pci_config(bus, slot, 3, 0x8c);  in pci_enable_pci_io_ecs()
371 				write_pci_config(bus, slot, 3, 0x8c, val);  in pci_enable_pci_io_ecs()