195 static u8 add_2reg(u8 byte, u32 dst_reg, u32 src_reg)  in add_2reg()  function
215 			EMIT2(0x33, add_2reg(0xC0, IA32_EAX, IA32_EAX));  in emit_ia32_mov_i()
217 			EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mov_i()
225 			EMIT2(0x33, add_2reg(0xC0, dst, dst));  in emit_ia32_mov_i()
243 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src));  in emit_ia32_mov_r()
246 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, sreg), STACK_VAR(dst));  in emit_ia32_mov_r()
249 		EMIT2(0x89, add_2reg(0xC0, dst, sreg));  in emit_ia32_mov_r()
294 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));  in emit_ia32_mul_r()
298 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));  in emit_ia32_mul_r()
301 		EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_mul_r()
308 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_r()
312 		EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_mul_r()
327 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_to_le_r64()
329 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_to_le_r64()
339 		EMIT1(add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_to_le_r64()
342 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_le_r64()
347 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_le_r64()
356 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_to_le_r64()
359 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_to_le_r64()
375 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_to_be_r64()
377 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_to_be_r64()
387 		EMIT1(add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_to_be_r64()
391 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_be_r64()
400 			EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_to_be_r64()
412 		EMIT2(0x89, add_2reg(0xC0, IA32_ECX, dreg_hi));  in emit_ia32_to_be_r64()
414 		EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_to_be_r64()
416 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, IA32_ECX));  in emit_ia32_to_be_r64()
422 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_to_be_r64()
425 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_to_be_r64()
443 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_div_mod_r()
447 		EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));  in emit_ia32_div_mod_r()
451 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_div_mod_r()
455 		EMIT2(0x8B, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_div_mod_r()
458 	EMIT2(0x31, add_2reg(0xC0, IA32_EDX, IA32_EDX));  in emit_ia32_div_mod_r()
464 			EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_div_mod_r()
467 			EMIT2(0x89, add_2reg(0xC0, dst, IA32_EDX));  in emit_ia32_div_mod_r()
470 			EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_div_mod_r()
473 			EMIT2(0x89, add_2reg(0xC0, dst, IA32_EAX));  in emit_ia32_div_mod_r()
492 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));  in emit_ia32_shift_r()
496 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src));  in emit_ia32_shift_r()
499 		EMIT2(0x8B, add_2reg(0xC0, src, IA32_ECX));  in emit_ia32_shift_r()
515 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg), STACK_VAR(dst));  in emit_ia32_shift_r()
534 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(src));  in emit_ia32_alu_r()
538 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(dst));  in emit_ia32_alu_r()
544 			EMIT2(0x11, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
546 			EMIT2(0x01, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
551 			EMIT2(0x19, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
553 			EMIT2(0x29, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
557 		EMIT2(0x09, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
561 		EMIT2(0x21, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
565 		EMIT2(0x31, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_r()
571 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),  in emit_ia32_alu_r()
608 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(dst));  in emit_ia32_alu_i()
621 				EMIT2(0x11, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
626 				EMIT2(0x01, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
635 				EMIT2(0x19, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
640 				EMIT2(0x29, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
648 			EMIT2(0x09, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
655 			EMIT2(0x21, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
662 			EMIT2(0x31, add_2reg(0xC0, dreg, sreg));  in emit_ia32_alu_i()
671 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg),  in emit_ia32_alu_i()
706 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_neg64()
708 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_neg64()
721 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_neg64()
724 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_neg64()
740 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_lsh_r64()
742 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_lsh_r64()
748 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_lsh_r64()
752 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_lsh_r64()
755 	EMIT3(0x0F, 0xA5, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_lsh_r64()
767 	EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_lsh_r64()
769 	EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_r64()
773 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_lsh_r64()
776 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_lsh_r64()
793 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_arsh_r64()
795 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_arsh_r64()
801 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_arsh_r64()
805 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_arsh_r64()
808 	EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_r64()
820 	EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_r64()
826 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_arsh_r64()
829 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_arsh_r64()
846 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_rsh_r64()
848 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_rsh_r64()
854 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_rsh_r64()
858 		EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_ECX));  in emit_ia32_rsh_r64()
861 	EMIT3(0x0F, 0xAD, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_rsh_r64()
873 	EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_rsh_r64()
875 	EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_r64()
879 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_rsh_r64()
882 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_rsh_r64()
899 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_lsh_i64()
901 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_lsh_i64()
907 		EMIT4(0x0F, 0xA4, add_2reg(0xC0, dreg_hi, dreg_lo), val);  in emit_ia32_lsh_i64()
916 		EMIT2(0x89, add_2reg(0xC0, dreg_hi, dreg_lo));  in emit_ia32_lsh_i64()
918 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_i64()
921 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_lsh_i64()
923 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_lsh_i64()
928 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_lsh_i64()
931 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_lsh_i64()
947 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_rsh_i64()
949 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_rsh_i64()
956 		EMIT4(0x0F, 0xAC, add_2reg(0xC0, dreg_lo, dreg_hi), val);  in emit_ia32_rsh_i64()
965 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_rsh_i64()
967 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_i64()
970 		EMIT2(0x33, add_2reg(0xC0, dreg_lo, dreg_lo));  in emit_ia32_rsh_i64()
972 		EMIT2(0x33, add_2reg(0xC0, dreg_hi, dreg_hi));  in emit_ia32_rsh_i64()
977 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_rsh_i64()
980 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_rsh_i64()
996 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_arsh_i64()
998 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_ia32_arsh_i64()
1004 		EMIT4(0x0F, 0xAC, add_2reg(0xC0, dreg_lo, dreg_hi), val);  in emit_ia32_arsh_i64()
1013 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_i64()
1021 		EMIT2(0x89, add_2reg(0xC0, dreg_lo, dreg_hi));  in emit_ia32_arsh_i64()
1026 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_lo),  in emit_ia32_arsh_i64()
1029 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, dreg_hi),  in emit_ia32_arsh_i64()
1043 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_r64()
1047 		EMIT2(0x8B, add_2reg(0xC0, dst_hi, IA32_EAX));  in emit_ia32_mul_r64()
1057 	EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_r64()
1061 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_r64()
1065 		EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1075 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_r64()
1079 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_r64()
1083 		EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1093 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));  in emit_ia32_mul_r64()
1097 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_r64()
1100 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_mul_r64()
1104 		EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_r64()
1106 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_r64()
1130 	EMIT2(0x89, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_i64()
1141 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EAX));  in emit_ia32_mul_i64()
1153 	EMIT2(0x01, add_2reg(0xC0, IA32_ECX, IA32_EDX));  in emit_ia32_mul_i64()
1157 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_ia32_mul_i64()
1160 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX),  in emit_ia32_mul_i64()
1164 		EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EAX));  in emit_ia32_mul_i64()
1166 		EMIT2(0x89, add_2reg(0xC0, dst_hi, IA32_ECX));  in emit_ia32_mul_i64()
1225 	EMIT2(0x31, add_2reg(0xC0, IA32_EBX, IA32_EBX));  in emit_prologue()
1228 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBP), STACK_VAR(fplo));  in emit_prologue()
1229 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(fphi));  in emit_prologue()
1233 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0]));  in emit_prologue()
1234 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(r1[1]));  in emit_prologue()
1237 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[0]));  in emit_prologue()
1238 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));  in emit_prologue()
1252 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r0[0]));  in emit_epilogue()
1254 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r0[1]));  in emit_epilogue()
1260 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), -12);  in emit_epilogue()
1262 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ESI), -8);  in emit_epilogue()
1264 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDI), -4);  in emit_epilogue()
1315 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r2[0]));  in emit_bpf_tail_call()
1317 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX), STACK_VAR(r3[0]));  in emit_bpf_tail_call()
1320 	EMIT3(0x39, add_2reg(0x40, IA32_EAX, IA32_EDX),  in emit_bpf_tail_call()
1331 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));  in emit_bpf_tail_call()
1332 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));  in emit_bpf_tail_call()
1349 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(tcc[0]));  in emit_bpf_tail_call()
1351 	EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EBX), STACK_VAR(tcc[1]));  in emit_bpf_tail_call()
1362 	EMIT2(0x85, add_2reg(0xC0, IA32_EDX, IA32_EDX));  in emit_bpf_tail_call()
1368 	EMIT3(0x8B, add_2reg(0x40, IA32_EDX, IA32_EDX),  in emit_bpf_tail_call()
1374 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX), STACK_VAR(r1[0]));  in emit_bpf_tail_call()
1397 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_hi));  in emit_push_r64()
1402 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));  in emit_push_r64()
1415 	EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX), STACK_VAR(src_lo));  in emit_push_r32()
1611 		EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++),  in emit_kfunc_call()
1615 			EMIT3(0x8B, add_2reg(0x40, IA32_EBP, *cur_arg_reg++),  in emit_kfunc_call()
1642 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in emit_kfunc_call()
1647 		EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),  in emit_kfunc_call()
1918 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
1922 				EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in do_jit()
1958 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
1962 				EMIT2(0x8B, add_2reg(0xC0, dst_lo, IA32_EAX));  in do_jit()
1966 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in do_jit()
1970 				EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EDX));  in do_jit()
1983 				EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),  in do_jit()
1986 				EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX),  in do_jit()
1992 					EMIT3(0x8B, add_2reg(0x40, IA32_EBP,  in do_jit()
1997 					EMIT2(0x8B, add_2reg(0xC0, src_hi,  in do_jit()
2001 					EMIT2(add_2reg(0x40, IA32_EAX,  in do_jit()
2005 					EMIT1(add_2reg(0x80, IA32_EAX,  in do_jit()
2019 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2023 				EMIT2(0x8B, add_2reg(0xC0, src_lo, IA32_EAX));  in do_jit()
2036 				EMIT2(add_2reg(0x40, IA32_EAX, IA32_EDX),  in do_jit()
2039 				EMIT1_off32(add_2reg(0x80, IA32_EAX, IA32_EDX),  in do_jit()
2044 				EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),  in do_jit()
2048 				EMIT2(0x89, add_2reg(0xC0, dst_lo, IA32_EDX));  in do_jit()
2062 					      add_2reg(0xC0, dst_hi, dst_hi));  in do_jit()
2067 					    add_2reg(0x80, IA32_EAX, IA32_EDX),  in do_jit()
2071 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2076 					      add_2reg(0xC0, dst_hi, IA32_EDX));  in do_jit()
2116 			EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2119 			EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EDX),  in do_jit()
2130 			EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2133 			EMIT3(0x89, add_2reg(0x40, IA32_EBP, IA32_EDX),  in do_jit()
2168 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2172 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2178 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in do_jit()
2182 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2189 				EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2193 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2206 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2209 				      add_2reg(0x40, IA32_EBP,  in do_jit()
2215 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in do_jit()
2218 				      add_2reg(0x40, IA32_EBP,  in do_jit()
2224 			EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2227 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2239 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2243 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2248 				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));  in do_jit()
2252 					      add_2reg(0xC0, dreg_hi, dst_hi));  in do_jit()
2256 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_ECX),  in do_jit()
2260 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2265 			EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));  in do_jit()
2268 				EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));  in do_jit()
2270 				EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));  in do_jit()
2284 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2288 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2293 				EMIT2(0x89, add_2reg(0xC0, dreg_lo, dst_lo));  in do_jit()
2297 					      add_2reg(0xC0, dreg_hi, dst_hi));  in do_jit()
2304 			EMIT2(0x23, add_2reg(0xC0, sreg_lo, dreg_lo));  in do_jit()
2310 				EMIT2(0x23, add_2reg(0xC0, sreg_hi, dreg_hi));  in do_jit()
2312 				EMIT2(0x09, add_2reg(0xC0, dreg_lo, dreg_hi));  in do_jit()
2340 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2344 					      add_2reg(0x40, IA32_EBP,  in do_jit()
2356 				EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2360 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()
2387 				EMIT3(0x8B, add_2reg(0x40, IA32_EBP, IA32_EAX),  in do_jit()
2390 				      add_2reg(0x40, IA32_EBP,  in do_jit()
2401 			EMIT2(0x39, add_2reg(0xC0, dreg_hi, sreg_hi));  in do_jit()
2404 			EMIT2(0x39, add_2reg(0xC0, dreg_lo, sreg_lo));  in do_jit()