1 // SPDX-License-Identifier: GPL-2.0
11 phys_addr_t physical_mask __ro_after_init = (1ULL << __PHYSICAL_MASK_SHIFT) - 1;
39 		return -EINVAL;  in setup_userpte()
48 		return -EINVAL;  in setup_userpte()
66 	 * NOTE! For PAE, any changes to the top page-directory-pointer-table  in ___pmd_free_tlb()
70 	tlb->need_flush_all = 1;  in ___pmd_free_tlb()
100 	list_add(&ptdesc->pt_list, &pgd_list);  in pgd_list_add()
107 	list_del(&ptdesc->pt_list);  in pgd_list_del()
118 	virt_to_ptdesc(pgd)->pt_mm = mm;  in pgd_set_mm()
123 	return page_ptdesc(page)->pt_mm;  in pgd_page_get_mm()
129 	   ptes in non-PAE, or shared PMD in PAE), then just copy the  in pgd_ctor()
157  * List of all pgd's needed for non-PAE so it can invalidate entries
160  * tactic would be needed. This is essentially codepath-based locking
164  * -- nyc
170  * updating the top-level pagetable entries to guarantee the
172  * all 4 top-level entries are used almost immediately in a
173  * new process's life, we just pre-populate them here.
183  * We allocate separate PMDs for the kernel part of the user page-table
184  * when PTI is enabled. We need them to map the per-process LDT into the
185  * user-space page-table.
200 	 * According to Intel App note "TLBs, Paging-Structure Caches,  in pud_populate()
201 	 * and Their Invalidation", April 2007, document 317080-001,  in pud_populate()
203 	 * TLB via cr3 if the top-level pgd is changed...  in pud_populate()
209 /* No need to prepopulate any pagetable entries in non-PAE modes. */
262 		return -ENOMEM;  in preallocate_pmds()
388 	 * page for pgd. We are able to just allocate a 32-byte for pgd.  in pgtable_cache_init()
389 	 * During boot time, we create a 32-byte slab for pgd table allocation.  in pgtable_cache_init()
407 	 * a 32-byte slab for pgd to save memory space.  in _pgd_alloc()
444 	mm->pgd = pgd;  in pgd_alloc()
458 	 * Make sure that pre-populating the pmds is atomic with  in pgd_alloc()
526 		 * We had a write-protection fault here and changed the pmd  in pmdp_set_access_flags()
528 		 * #PF is architecturally guaranteed to do that and in the  in pmdp_set_access_flags()
529 		 * worst-case we'll generate a spurious fault.  in pmdp_set_access_flags()
546 		 * We had a write-protection fault here and changed the pud  in pudp_set_access_flags()
548 		 * #PF is architecturally guaranteed to do that and in the  in pudp_set_access_flags()
549 		 * worst-case we'll generate a spurious fault.  in pudp_set_access_flags()
564 					 (unsigned long *) &ptep->pte);  in ptep_test_and_clear_young()
569 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
644 #if defined(CONFIG_TRANSPARENT_HUGEPAGE) && \
645 	defined(CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE_PUD)
657  * reserve_top_address - reserves a hole in the top of kernel address space
658  * @reserve - size of hole to reserve
667 	__FIXADDR_TOP = round_down(-reserve, 1 << PMD_SHIFT) - PAGE_SIZE;  in reserve_top_address()
669 	       -reserve, __FIXADDR_TOP + PAGE_SIZE);  in reserve_top_address()
708  * p4d_set_huge - setup kernel P4D mapping
710  * No 512GB pages yet -- always return 0
718  * p4d_clear_huge - clear kernel P4D mapping when it is set
720  * No 512GB pages yet -- always return 0
728  * pud_set_huge - setup kernel PUD mapping
734  * Callers should try to decrease page size (1GB -> 2MB -> 4K) if the bigger
747 	/* Bail out if we are we on a populated non-leaf entry: */  in pud_set_huge()
759  * pmd_set_huge - setup kernel PMD mapping
771 …pr_warn_once("%s: Cannot satisfy [mem %#010llx-%#010llx] with a huge-page mapping due to MTRR over…  in pmd_set_huge()
776 	/* Bail out if we are we on a populated non-leaf entry: */  in pmd_set_huge()
788  * pud_clear_huge - clear kernel PUD mapping when it is set
803  * pmd_clear_huge - clear kernel PMD mapping when it is set
819  * pud_free_pmd_page - Clear pud entry and free pmd page.
847 	/* INVLPG to clear all paging-structure caches */  in pud_free_pmd_page()
848 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);  in pud_free_pmd_page()
866  * pmd_free_pte_page - Clear pmd entry and free pte page.
880 	/* INVLPG to clear all paging-structure caches */  in pmd_free_pte_page()
881 	flush_tlb_kernel_range(addr, addr + PAGE_SIZE-1);  in pmd_free_pte_page()
891  * Disable free page handling on x86-PAE. This assures that ioremap()
904 	if (vma->vm_flags & VM_SHADOW_STACK)  in pte_mkwrite()
914 	if (vma->vm_flags & VM_SHADOW_STACK)  in pmd_mkwrite()
931 	VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&  in arch_check_zapped_pte()
938 	VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) &&  in arch_check_zapped_pmd()
945 	VM_WARN_ON_ONCE(!(vma->vm_flags & VM_SHADOW_STACK) && pud_shstk(pud));  in arch_check_zapped_pud()