Lines Matching +full:reserved +full:- +full:ipi +full:- +full:vectors
1 // SPDX-License-Identifier: GPL-2.0-only
50 #define mod_64(x, y) ((x) - (y) * div64_u64(x, y))
66 * VM-Exit (to inject the guest event) and the subsequent VM-Enter to resume
77 /* step-by-step approximation to mitigate fluctuation */
89 __kvm_lapic_set_reg(apic->regs, reg_off, val); in kvm_lapic_set_reg()
100 return __kvm_lapic_get_reg64(apic->regs, reg); in kvm_lapic_get_reg64()
112 __kvm_lapic_set_reg64(apic->regs, reg, val); in kvm_lapic_set_reg64()
122 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_pending_eoi()
124 return apic_test_vector(vector, apic->regs + APIC_ISR) || in kvm_apic_pending_eoi()
125 apic_test_vector(vector, apic->regs + APIC_IRR); in kvm_apic_pending_eoi()
158 return apic->vcpu->vcpu_id; in kvm_x2apic_id()
164 (kvm_mwait_in_guest(vcpu->kvm) || kvm_hlt_in_guest(vcpu->kvm)); in kvm_can_post_timer_interrupt()
170 && !(kvm_mwait_in_guest(vcpu->kvm) || in kvm_can_use_hv_timer()
176 return kvm_can_post_timer_interrupt(vcpu) && vcpu->mode == IN_GUEST_MODE; in kvm_use_posted_timer_interrupt()
186 switch (map->logical_mode) { in kvm_apic_map_get_logical_dest()
189 *cluster = map->xapic_flat_map; in kvm_apic_map_get_logical_dest()
194 u32 max_apic_id = map->max_apic_id; in kvm_apic_map_get_logical_dest()
197 u8 cluster_size = min(max_apic_id - offset + 1, 16U); in kvm_apic_map_get_logical_dest()
199 offset = array_index_nospec(offset, map->max_apic_id + 1); in kvm_apic_map_get_logical_dest()
200 *cluster = &map->phys_map[offset]; in kvm_apic_map_get_logical_dest()
201 *mask = dest_id & (0xffff >> (16 - cluster_size)); in kvm_apic_map_get_logical_dest()
209 *cluster = map->xapic_flat_map; in kvm_apic_map_get_logical_dest()
213 *cluster = map->xapic_cluster_map[(dest_id >> 4) & 0xf]; in kvm_apic_map_get_logical_dest()
235 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_phys_map()
245 if (WARN_ON_ONCE(xapic_id > new->max_apic_id)) in kvm_recalculate_phys_map()
246 return -EINVAL; in kvm_recalculate_phys_map()
254 if (x2apic_id > new->max_apic_id) in kvm_recalculate_phys_map()
255 return -E2BIG; in kvm_recalculate_phys_map()
260 * 32-bit value. Any unwanted aliasing due to truncation results will in kvm_recalculate_phys_map()
263 if (!apic_x2apic_mode(apic) && xapic_id != (u8)vcpu->vcpu_id) in kvm_recalculate_phys_map()
267 * Apply KVM's hotplug hack if userspace has enable 32-bit APIC IDs. in kvm_recalculate_phys_map()
273 * Honor the architectural (and KVM's non-optimized) behavior if in kvm_recalculate_phys_map()
274 * userspace has not enabled 32-bit x2APIC IDs. Each APIC is supposed in kvm_recalculate_phys_map()
280 if (vcpu->kvm->arch.x2apic_format) { in kvm_recalculate_phys_map()
283 new->phys_map[x2apic_id] = apic; in kvm_recalculate_phys_map()
285 if (!apic_x2apic_mode(apic) && !new->phys_map[xapic_id]) in kvm_recalculate_phys_map()
286 new->phys_map[xapic_id] = apic; in kvm_recalculate_phys_map()
298 if (new->phys_map[physical_id]) in kvm_recalculate_phys_map()
299 return -EINVAL; in kvm_recalculate_phys_map()
301 new->phys_map[physical_id] = apic; in kvm_recalculate_phys_map()
310 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_recalculate_logical_map()
316 if (new->logical_mode == KVM_APIC_MODE_MAP_DISABLED) in kvm_recalculate_logical_map()
337 * To optimize logical mode delivery, all software-enabled APICs must in kvm_recalculate_logical_map()
340 if (new->logical_mode == KVM_APIC_MODE_SW_DISABLED) { in kvm_recalculate_logical_map()
341 new->logical_mode = logical_mode; in kvm_recalculate_logical_map()
342 } else if (new->logical_mode != logical_mode) { in kvm_recalculate_logical_map()
343 new->logical_mode = KVM_APIC_MODE_MAP_DISABLED; in kvm_recalculate_logical_map()
348 * In x2APIC mode, the LDR is read-only and derived directly from the in kvm_recalculate_logical_map()
359 new->logical_mode = KVM_APIC_MODE_MAP_DISABLED; in kvm_recalculate_logical_map()
366 ldr = ffs(mask) - 1; in kvm_recalculate_logical_map()
368 new->logical_mode = KVM_APIC_MODE_MAP_DISABLED; in kvm_recalculate_logical_map()
374 * CLEAN -> DIRTY and UPDATE_IN_PROGRESS -> DIRTY changes happen without a lock.
376 * DIRTY -> UPDATE_IN_PROGRESS and UPDATE_IN_PROGRESS -> CLEAN happen with
394 /* Read kvm->arch.apic_map_dirty before kvm->arch.apic_map. */ in kvm_recalculate_apic_map()
395 if (atomic_read_acquire(&kvm->arch.apic_map_dirty) == CLEAN) in kvm_recalculate_apic_map()
399 "Dirty APIC map without an in-kernel local APIC"); in kvm_recalculate_apic_map()
401 mutex_lock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
405 * Read kvm->arch.apic_map_dirty before kvm->arch.apic_map (if clean) in kvm_recalculate_apic_map()
408 * ID, i.e. the map may still show up as in-progress. In that case in kvm_recalculate_apic_map()
411 if (atomic_cmpxchg_acquire(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
414 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
429 max_id = max(max_id, kvm_x2apic_id(vcpu->arch.apic)); in kvm_recalculate_apic_map()
438 new->max_apic_id = max_id; in kvm_recalculate_apic_map()
439 new->logical_mode = KVM_APIC_MODE_SW_DISABLED; in kvm_recalculate_apic_map()
449 if (r == -E2BIG) { in kvm_recalculate_apic_map()
470 if (!new || new->logical_mode == KVM_APIC_MODE_MAP_DISABLED) in kvm_recalculate_apic_map()
480 old = rcu_dereference_protected(kvm->arch.apic_map, in kvm_recalculate_apic_map()
481 lockdep_is_held(&kvm->arch.apic_map_lock)); in kvm_recalculate_apic_map()
482 rcu_assign_pointer(kvm->arch.apic_map, new); in kvm_recalculate_apic_map()
484 * Write kvm->arch.apic_map before clearing apic->apic_map_dirty. in kvm_recalculate_apic_map()
487 atomic_cmpxchg_release(&kvm->arch.apic_map_dirty, in kvm_recalculate_apic_map()
489 mutex_unlock(&kvm->arch.apic_map_lock); in kvm_recalculate_apic_map()
492 call_rcu(&old->rcu, kvm_apic_map_free); in kvm_recalculate_apic_map()
503 if (enabled != apic->sw_enabled) { in apic_set_spiv()
504 apic->sw_enabled = enabled; in apic_set_spiv()
510 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in apic_set_spiv()
515 kvm_make_request(KVM_REQ_APF_READY, apic->vcpu); in apic_set_spiv()
516 kvm_xen_sw_enable_lapic(apic->vcpu); in apic_set_spiv()
523 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_xapic_id()
529 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_ldr()
535 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_dfr()
542 WARN_ON_ONCE(id != apic->vcpu->vcpu_id); in kvm_apic_set_x2apic_id()
546 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_x2apic_id()
556 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_ONESHOT; in apic_lvtt_oneshot()
561 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_PERIODIC; in apic_lvtt_period()
566 return apic->lapic_timer.timer_mode == APIC_LVT_TIMER_TSCDEADLINE; in apic_lvtt_tscdeadline()
576 return apic->nr_lvt_entries > lvt_index; in kvm_lapic_lvt_supported()
581 return KVM_APIC_MAX_NR_LVT_ENTRIES - !(vcpu->arch.mcg_cap & MCG_CMCI_P); in kvm_apic_calc_nr_lvt_entries()
586 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_version()
592 v = APIC_VERSION | ((apic->nr_lvt_entries - 1) << 16); in kvm_apic_set_version()
595 * KVM emulates 82093AA datasheet (with in-kernel IOAPIC implementation) in kvm_apic_set_version()
597 * Hyper-V role) disable EOI broadcast in lapic not checking for IOAPIC in kvm_apic_set_version()
598 * version first and level-triggered interrupts never get EOIed in in kvm_apic_set_version()
602 !ioapic_in_kernel(vcpu->kvm)) in kvm_apic_set_version()
610 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_after_set_mcg_cap()
613 if (!lapic_in_kernel(vcpu) || nr_lvt_entries == apic->nr_lvt_entries) in kvm_apic_after_set_mcg_cap()
617 for (i = apic->nr_lvt_entries; i < nr_lvt_entries; i++) in kvm_apic_after_set_mcg_cap()
620 apic->nr_lvt_entries = nr_lvt_entries; in kvm_apic_after_set_mcg_cap()
641 for (vec = MAX_APIC_VECTOR - APIC_VECTORS_PER_REG; in find_highest_vector()
642 vec >= 0; vec -= APIC_VECTORS_PER_REG) { in find_highest_vector()
648 return -1; in find_highest_vector()
671 max_updated_irr = -1; in __kvm_apic_update_irr()
672 *max_irr = -1; in __kvm_apic_update_irr()
696 return ((max_updated_irr != -1) && in __kvm_apic_update_irr()
703 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_irr()
704 bool irr_updated = __kvm_apic_update_irr(pir, apic->regs, max_irr); in kvm_apic_update_irr()
706 if (unlikely(!apic->apicv_active && irr_updated)) in kvm_apic_update_irr()
707 apic->irr_pending = true; in kvm_apic_update_irr()
714 return find_highest_vector(apic->regs + APIC_IRR); in apic_search_irr()
725 if (!apic->irr_pending) in apic_find_highest_irr()
726 return -1; in apic_find_highest_irr()
729 ASSERT(result == -1 || result >= 16); in apic_find_highest_irr()
736 if (unlikely(apic->apicv_active)) { in apic_clear_irr()
738 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
739 kvm_x86_call(hwapic_irr_update)(apic->vcpu, in apic_clear_irr()
742 apic->irr_pending = false; in apic_clear_irr()
743 kvm_lapic_clear_vector(vec, apic->regs + APIC_IRR); in apic_clear_irr()
744 if (apic_search_irr(apic) != -1) in apic_clear_irr()
745 apic->irr_pending = true; in apic_clear_irr()
751 apic_clear_irr(vec, vcpu->arch.apic); in kvm_apic_clear_irr()
757 if (__apic_test_and_set_vector(vec, apic->regs + APIC_ISR)) in apic_set_isr()
765 if (unlikely(apic->apicv_active)) in apic_set_isr()
768 ++apic->isr_count; in apic_set_isr()
769 BUG_ON(apic->isr_count > MAX_APIC_VECTOR); in apic_set_isr()
775 apic->highest_isr_cache = vec; in apic_set_isr()
785 * is always -1, with APIC virtualization enabled. in apic_find_highest_isr()
787 if (!apic->isr_count) in apic_find_highest_isr()
788 return -1; in apic_find_highest_isr()
789 if (likely(apic->highest_isr_cache != -1)) in apic_find_highest_isr()
790 return apic->highest_isr_cache; in apic_find_highest_isr()
792 result = find_highest_vector(apic->regs + APIC_ISR); in apic_find_highest_isr()
793 ASSERT(result == -1 || result >= 16); in apic_find_highest_isr()
800 if (!__apic_test_and_clear_vector(vec, apic->regs + APIC_ISR)) in apic_clear_isr()
805 * uses the Hyper-V APIC enlightenment. In this case we may need in apic_clear_isr()
810 if (unlikely(apic->apicv_active)) in apic_clear_isr()
813 --apic->isr_count; in apic_clear_isr()
814 BUG_ON(apic->isr_count < 0); in apic_clear_isr()
815 apic->highest_isr_cache = -1; in apic_clear_isr()
826 return apic_find_highest_irr(vcpu->arch.apic); in kvm_lapic_find_highest_irr()
837 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_irq()
839 return __apic_accept_irq(apic, irq->delivery_mode, irq->vector, in kvm_apic_set_irq()
840 irq->level, irq->trig_mode, dest_map); in kvm_apic_set_irq()
849 if (min > map->max_apic_id) in __pv_send_ipi()
853 min((u32)BITS_PER_LONG, (map->max_apic_id - min + 1))) { in __pv_send_ipi()
854 if (map->phys_map[min + i]) { in __pv_send_ipi()
855 vcpu = map->phys_map[min + i]->vcpu; in __pv_send_ipi()
873 return -KVM_EINVAL; in kvm_pv_send_ipi()
881 map = rcu_dereference(kvm->arch.apic_map); in kvm_pv_send_ipi()
883 count = -EOPNOTSUPP; in kvm_pv_send_ipi()
897 return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, &val, in pv_eoi_put_user()
904 return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.pv_eoi.data, val, in pv_eoi_get_user()
910 return vcpu->arch.pv_eoi.msr_val & KVM_MSR_ENABLED; in pv_eoi_enabled()
918 __set_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_set_pending()
938 __clear_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention); in pv_eoi_test_and_clr_pending()
947 highest_irr = kvm_x86_call(sync_pir_to_irr)(apic->vcpu); in apic_has_interrupt_for_ppr()
950 if (highest_irr == -1 || (highest_irr & 0xF0) <= ppr) in apic_has_interrupt_for_ppr()
951 return -1; in apic_has_interrupt_for_ppr()
963 isrv = (isr != -1) ? isr : 0; in __apic_update_ppr()
982 apic_has_interrupt_for_ppr(apic, ppr) != -1) in apic_update_ppr()
983 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_update_ppr()
988 apic_update_ppr(vcpu->arch.apic); in kvm_apic_update_ppr()
1052 * - Real hardware delivers interrupts destined to x2APIC ID > 0xff to LAPICs
1056 * - in-kernel IOAPIC messages have to be delivered directly to
1059 * rewrites the destination of non-IPI messages from APIC_BROADCAST
1063 * important when userspace wants to use x2APIC-format MSIs, because
1064 * APIC_BROADCAST (0xff) is a legal route for "cluster 0, CPUs 0-7".
1069 bool ipi = source != NULL; in kvm_apic_mda() local
1071 if (!vcpu->kvm->arch.x2apic_broadcast_quirk_disabled && in kvm_apic_mda()
1072 !ipi && dest_id == APIC_BROADCAST && apic_x2apic_mode(target)) in kvm_apic_mda()
1081 struct kvm_lapic *target = vcpu->arch.apic; in kvm_apic_match_dest()
1107 int i, idx = -1; in kvm_vector_to_index()
1121 if (!kvm->arch.disabled_lapic_found) { in kvm_apic_disabled_lapic_found()
1122 kvm->arch.disabled_lapic_found = true; in kvm_apic_disabled_lapic_found()
1130 if (kvm->arch.x2apic_broadcast_quirk_disabled) { in kvm_apic_is_broadcast_dest()
1131 if ((irq->dest_id == APIC_BROADCAST && in kvm_apic_is_broadcast_dest()
1132 map->logical_mode != KVM_APIC_MODE_X2APIC)) in kvm_apic_is_broadcast_dest()
1134 if (irq->dest_id == X2APIC_BROADCAST) in kvm_apic_is_broadcast_dest()
1138 if (irq->dest_id == (x2apic_ipi ? in kvm_apic_is_broadcast_dest()
1160 if (irq->shorthand == APIC_DEST_SELF && src) { in kvm_apic_map_get_dest_lapic()
1164 } else if (irq->shorthand) in kvm_apic_map_get_dest_lapic()
1170 if (irq->dest_mode == APIC_DEST_PHYSICAL) { in kvm_apic_map_get_dest_lapic()
1171 if (irq->dest_id > map->max_apic_id) { in kvm_apic_map_get_dest_lapic()
1174 u32 dest_id = array_index_nospec(irq->dest_id, map->max_apic_id + 1); in kvm_apic_map_get_dest_lapic()
1175 *dst = &map->phys_map[dest_id]; in kvm_apic_map_get_dest_lapic()
1182 if (!kvm_apic_map_get_logical_dest(map, irq->dest_id, dst, in kvm_apic_map_get_dest_lapic()
1190 lowest = -1; in kvm_apic_map_get_dest_lapic()
1196 else if (kvm_apic_compare_prio((*dst)[i]->vcpu, in kvm_apic_map_get_dest_lapic()
1197 (*dst)[lowest]->vcpu) < 0) in kvm_apic_map_get_dest_lapic()
1204 lowest = kvm_vector_to_index(irq->vector, hweight16(*bitmap), in kvm_apic_map_get_dest_lapic()
1228 *r = -1; in kvm_irq_delivery_to_apic_fast()
1230 if (irq->shorthand == APIC_DEST_SELF) { in kvm_irq_delivery_to_apic_fast()
1235 *r = kvm_apic_set_irq(src->vcpu, irq, dest_map); in kvm_irq_delivery_to_apic_fast()
1240 map = rcu_dereference(kvm->arch.apic_map); in kvm_irq_delivery_to_apic_fast()
1248 *r += kvm_apic_set_irq(dst[i]->vcpu, irq, dest_map); in kvm_irq_delivery_to_apic_fast()
1259 * - For single-destination interrupts, handle it in posted mode
1260 * - Else if vector hashing is enabled and it is a lowest-priority
1263 * 1. For lowest-priority interrupts, store all the possible
1266 * the right destination vCPU in the array for the lowest-priority
1268 * - Otherwise, use remapped mode to inject the interrupt.
1278 if (irq->shorthand) in kvm_intr_is_single_vcpu_fast()
1282 map = rcu_dereference(kvm->arch.apic_map); in kvm_intr_is_single_vcpu_fast()
1289 *dest_vcpu = dst[i]->vcpu; in kvm_intr_is_single_vcpu_fast()
1307 struct kvm_vcpu *vcpu = apic->vcpu; in __apic_accept_irq()
1309 trace_kvm_apic_accept_irq(vcpu->vcpu_id, delivery_mode, in __apic_accept_irq()
1313 vcpu->arch.apic_arb_prio++; in __apic_accept_irq()
1326 __set_bit(vcpu->vcpu_id, dest_map->map); in __apic_accept_irq()
1327 dest_map->vectors[vcpu->vcpu_id] = vector; in __apic_accept_irq()
1330 if (apic_test_vector(vector, apic->regs + APIC_TMR) != !!trig_mode) { in __apic_accept_irq()
1333 apic->regs + APIC_TMR); in __apic_accept_irq()
1336 apic->regs + APIC_TMR); in __apic_accept_irq()
1345 vcpu->arch.pv.pv_unhalted = 1; in __apic_accept_irq()
1367 apic->pending_events = (1UL << KVM_APIC_INIT); in __apic_accept_irq()
1375 apic->sipi_vector = vector; in __apic_accept_irq()
1378 set_bit(KVM_APIC_SIPI, &apic->pending_events); in __apic_accept_irq()
1417 map = rcu_dereference(kvm->arch.apic_map); in kvm_bitmap_or_dest_vcpus()
1425 vcpu_idx = dest_vcpu[i]->vcpu->vcpu_idx; in kvm_bitmap_or_dest_vcpus()
1433 irq->shorthand, in kvm_bitmap_or_dest_vcpus()
1434 irq->dest_id, in kvm_bitmap_or_dest_vcpus()
1435 irq->dest_mode)) in kvm_bitmap_or_dest_vcpus()
1445 return vcpu1->arch.apic_arb_prio - vcpu2->arch.apic_arb_prio; in kvm_apic_compare_prio()
1450 return test_bit(vector, apic->vcpu->arch.ioapic_handled_vectors); in kvm_ioapic_handles_vector()
1462 if (irqchip_split(apic->vcpu->kvm)) { in kvm_ioapic_send_eoi()
1463 apic->vcpu->arch.pending_ioapic_eoi = vector; in kvm_ioapic_send_eoi()
1464 kvm_make_request(KVM_REQ_IOAPIC_EOI_EXIT, apic->vcpu); in kvm_ioapic_send_eoi()
1468 if (apic_test_vector(vector, apic->regs + APIC_TMR)) in kvm_ioapic_send_eoi()
1473 kvm_ioapic_update_eoi(apic->vcpu, vector, trigger_mode); in kvm_ioapic_send_eoi()
1486 if (vector == -1) in apic_set_eoi()
1492 if (kvm_hv_synic_has_vector(apic->vcpu, vector)) in apic_set_eoi()
1493 kvm_hv_synic_send_eoi(apic->vcpu, vector); in apic_set_eoi()
1496 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in apic_set_eoi()
1501 * this interface assumes a trap-like exit, which has already finished
1506 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_eoi_accelerated()
1511 kvm_make_request(KVM_REQ_EVENT, apic->vcpu); in kvm_apic_set_eoi_accelerated()
1536 kvm_irq_delivery_to_apic(apic->vcpu->kvm, apic, &irq, NULL); in kvm_apic_send_ipi()
1549 apic->lapic_timer.period == 0) in apic_get_tmcct()
1553 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in apic_get_tmcct()
1557 ns = mod_64(ktime_to_ns(remaining), apic->lapic_timer.period); in apic_get_tmcct()
1558 return div64_u64(ns, (apic->vcpu->kvm->arch.apic_bus_cycle_ns * in apic_get_tmcct()
1559 apic->divide_count)); in apic_get_tmcct()
1564 struct kvm_vcpu *vcpu = apic->vcpu; in __report_tpr_access()
1565 struct kvm_run *run = vcpu->run; in __report_tpr_access()
1568 run->tpr_access.rip = kvm_rip_read(vcpu); in __report_tpr_access()
1569 run->tpr_access.is_write = write; in __report_tpr_access()
1574 if (apic->vcpu->arch.tpr_access_reporting) in report_tpr_access()
1617 (APIC_REG_MASK(first) * ((1ull << (count)) - 1))
1621 /* Leave bits '0' for reserved and write-only registers. */ in kvm_lapic_readable_reg_mask()
1664 * WARN if KVM reads ICR in x2APIC mode, as it's an 8-byte register in in kvm_lapic_reg_read()
1696 return addr >= apic->base_address && in apic_mmio_in_range()
1697 addr < apic->base_address + LAPIC_MMIO_LENGTH; in apic_mmio_in_range()
1704 u32 offset = address - apic->base_address; in apic_mmio_read()
1707 return -EOPNOTSUPP; in apic_mmio_read()
1710 if (!kvm_check_has_quirk(vcpu->kvm, in apic_mmio_read()
1712 return -EOPNOTSUPP; in apic_mmio_read()
1730 apic->divide_count = 0x1 << (tmp2 & 0x7); in update_divide_count()
1740 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in limit_periodic_timer_frequency()
1743 if (apic->lapic_timer.period < min_period) { in limit_periodic_timer_frequency()
1747 apic->vcpu->vcpu_id, in limit_periodic_timer_frequency()
1748 apic->lapic_timer.period, min_period); in limit_periodic_timer_frequency()
1749 apic->lapic_timer.period = min_period; in limit_periodic_timer_frequency()
1758 hrtimer_cancel(&apic->lapic_timer.timer); in cancel_apic_timer()
1760 if (apic->lapic_timer.hv_timer_in_use) in cancel_apic_timer()
1763 atomic_set(&apic->lapic_timer.pending, 0); in cancel_apic_timer()
1769 apic->lapic_timer.timer_mode_mask; in apic_update_lvtt()
1771 if (apic->lapic_timer.timer_mode != timer_mode) { in apic_update_lvtt()
1776 apic->lapic_timer.period = 0; in apic_update_lvtt()
1777 apic->lapic_timer.tscdeadline = 0; in apic_update_lvtt()
1779 apic->lapic_timer.timer_mode = timer_mode; in apic_update_lvtt()
1786 * during a higher-priority task.
1791 struct kvm_lapic *apic = vcpu->arch.apic; in lapic_timer_int_injected()
1796 void *bitmap = apic->regs + APIC_ISR; in lapic_timer_int_injected()
1798 if (apic->apicv_active) in lapic_timer_int_injected()
1799 bitmap = apic->regs + APIC_IRR; in lapic_timer_int_injected()
1809 u64 timer_advance_ns = vcpu->arch.apic->lapic_timer.timer_advance_ns; in __wait_lapic_expire()
1817 if (vcpu->arch.tsc_scaling_ratio == kvm_caps.default_tsc_scaling_ratio) { in __wait_lapic_expire()
1822 do_div(delay_ns, vcpu->arch.virtual_tsc_khz); in __wait_lapic_expire()
1830 struct kvm_lapic *apic = vcpu->arch.apic; in adjust_lapic_timer_advance()
1831 u32 timer_advance_ns = apic->lapic_timer.timer_advance_ns; in adjust_lapic_timer_advance()
1841 ns = -advance_expire_delta * 1000000ULL; in adjust_lapic_timer_advance()
1842 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1843 timer_advance_ns -= ns/LAPIC_TIMER_ADVANCE_ADJUST_STEP; in adjust_lapic_timer_advance()
1847 do_div(ns, vcpu->arch.virtual_tsc_khz); in adjust_lapic_timer_advance()
1853 apic->lapic_timer.timer_advance_ns = timer_advance_ns; in adjust_lapic_timer_advance()
1858 struct kvm_lapic *apic = vcpu->arch.apic; in __kvm_wait_lapic_expire()
1861 tsc_deadline = apic->lapic_timer.expired_tscdeadline; in __kvm_wait_lapic_expire()
1862 apic->lapic_timer.expired_tscdeadline = 0; in __kvm_wait_lapic_expire()
1864 trace_kvm_wait_lapic_expire(vcpu->vcpu_id, guest_tsc - tsc_deadline); in __kvm_wait_lapic_expire()
1866 adjust_lapic_timer_advance(vcpu, guest_tsc - tsc_deadline); in __kvm_wait_lapic_expire()
1876 __wait_lapic_expire(vcpu, tsc_deadline - guest_tsc); in __kvm_wait_lapic_expire()
1882 vcpu->arch.apic->lapic_timer.expired_tscdeadline && in kvm_wait_lapic_expire()
1883 vcpu->arch.apic->lapic_timer.timer_advance_ns && in kvm_wait_lapic_expire()
1891 struct kvm_timer *ktimer = &apic->lapic_timer; in kvm_apic_inject_pending_timer_irqs()
1895 ktimer->tscdeadline = 0; in kvm_apic_inject_pending_timer_irqs()
1897 ktimer->tscdeadline = 0; in kvm_apic_inject_pending_timer_irqs()
1898 ktimer->target_expiration = 0; in kvm_apic_inject_pending_timer_irqs()
1904 struct kvm_vcpu *vcpu = apic->vcpu; in apic_timer_expired()
1905 struct kvm_timer *ktimer = &apic->lapic_timer; in apic_timer_expired()
1907 if (atomic_read(&apic->lapic_timer.pending)) in apic_timer_expired()
1910 if (apic_lvtt_tscdeadline(apic) || ktimer->hv_timer_in_use) in apic_timer_expired()
1911 ktimer->expired_tscdeadline = ktimer->tscdeadline; in apic_timer_expired()
1913 if (!from_timer_fn && apic->apicv_active) { in apic_timer_expired()
1919 if (kvm_use_posted_timer_interrupt(apic->vcpu)) { in apic_timer_expired()
1927 if (vcpu->arch.apic->lapic_timer.expired_tscdeadline && in apic_timer_expired()
1928 vcpu->arch.apic->lapic_timer.timer_advance_ns) in apic_timer_expired()
1934 atomic_inc(&apic->lapic_timer.pending); in apic_timer_expired()
1942 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_tscdeadline()
1943 u64 guest_tsc, tscdeadline = ktimer->tscdeadline; in start_sw_tscdeadline()
1946 struct kvm_vcpu *vcpu = apic->vcpu; in start_sw_tscdeadline()
1947 u32 this_tsc_khz = vcpu->arch.virtual_tsc_khz; in start_sw_tscdeadline()
1959 ns = (tscdeadline - guest_tsc) * 1000000ULL; in start_sw_tscdeadline()
1963 likely(ns > apic->lapic_timer.timer_advance_ns)) { in start_sw_tscdeadline()
1965 expire = ktime_sub_ns(expire, ktimer->timer_advance_ns); in start_sw_tscdeadline()
1966 hrtimer_start(&ktimer->timer, expire, HRTIMER_MODE_ABS_HARD); in start_sw_tscdeadline()
1975 return (u64)tmict * apic->vcpu->kvm->arch.apic_bus_cycle_ns * in tmict_to_ns()
1976 (u64)apic->divide_count; in tmict_to_ns()
1984 apic->lapic_timer.period = in update_target_expiration()
1989 remaining = ktime_sub(apic->lapic_timer.target_expiration, now); in update_target_expiration()
1995 apic->divide_count, old_divisor); in update_target_expiration()
1997 apic->lapic_timer.tscdeadline += in update_target_expiration()
1998 nsec_to_cycles(apic->vcpu, ns_remaining_new) - in update_target_expiration()
1999 nsec_to_cycles(apic->vcpu, ns_remaining_old); in update_target_expiration()
2000 apic->lapic_timer.target_expiration = ktime_add_ns(now, ns_remaining_new); in update_target_expiration()
2010 apic->lapic_timer.period = in set_target_expiration()
2013 if (!apic->lapic_timer.period) { in set_target_expiration()
2014 apic->lapic_timer.tscdeadline = 0; in set_target_expiration()
2019 deadline = apic->lapic_timer.period; in set_target_expiration()
2027 deadline = apic->lapic_timer.period; in set_target_expiration()
2031 else if (unlikely(deadline > apic->lapic_timer.period)) { in set_target_expiration()
2036 apic->vcpu->vcpu_id, in set_target_expiration()
2039 deadline, apic->lapic_timer.period); in set_target_expiration()
2041 deadline = apic->lapic_timer.period; in set_target_expiration()
2046 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in set_target_expiration()
2047 nsec_to_cycles(apic->vcpu, deadline); in set_target_expiration()
2048 apic->lapic_timer.target_expiration = ktime_add_ns(now, deadline); in set_target_expiration()
2066 apic->lapic_timer.target_expiration = in advance_periodic_target_expiration()
2067 ktime_add_ns(apic->lapic_timer.target_expiration, in advance_periodic_target_expiration()
2068 apic->lapic_timer.period); in advance_periodic_target_expiration()
2069 delta = ktime_sub(apic->lapic_timer.target_expiration, now); in advance_periodic_target_expiration()
2070 apic->lapic_timer.tscdeadline = kvm_read_l1_tsc(apic->vcpu, tscl) + in advance_periodic_target_expiration()
2071 nsec_to_cycles(apic->vcpu, delta); in advance_periodic_target_expiration()
2076 if (!apic->lapic_timer.period) in start_sw_period()
2080 apic->lapic_timer.target_expiration)) { in start_sw_period()
2089 hrtimer_start(&apic->lapic_timer.timer, in start_sw_period()
2090 apic->lapic_timer.target_expiration, in start_sw_period()
2099 return vcpu->arch.apic->lapic_timer.hv_timer_in_use; in kvm_lapic_hv_timer_in_use()
2105 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in cancel_hv_timer()
2106 kvm_x86_call(cancel_hv_timer)(apic->vcpu); in cancel_hv_timer()
2107 apic->lapic_timer.hv_timer_in_use = false; in cancel_hv_timer()
2112 struct kvm_timer *ktimer = &apic->lapic_timer; in start_hv_timer()
2113 struct kvm_vcpu *vcpu = apic->vcpu; in start_hv_timer()
2120 if (!ktimer->tscdeadline) in start_hv_timer()
2123 if (kvm_x86_call(set_hv_timer)(vcpu, ktimer->tscdeadline, &expired)) in start_hv_timer()
2126 ktimer->hv_timer_in_use = true; in start_hv_timer()
2127 hrtimer_cancel(&ktimer->timer); in start_hv_timer()
2132 * VM-Exit to recompute the periodic timer's target expiration. in start_hv_timer()
2139 if (atomic_read(&ktimer->pending)) { in start_hv_timer()
2147 trace_kvm_hv_timer_state(vcpu->vcpu_id, ktimer->hv_timer_in_use); in start_hv_timer()
2154 struct kvm_timer *ktimer = &apic->lapic_timer; in start_sw_timer()
2157 if (apic->lapic_timer.hv_timer_in_use) in start_sw_timer()
2159 if (!apic_lvtt_period(apic) && atomic_read(&ktimer->pending)) in start_sw_timer()
2166 trace_kvm_hv_timer_state(apic->vcpu->vcpu_id, false); in start_sw_timer()
2173 if (!apic_lvtt_period(apic) && atomic_read(&apic->lapic_timer.pending)) in restart_apic_timer()
2184 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_expired_hv_timer()
2188 if (!apic->lapic_timer.hv_timer_in_use) in kvm_lapic_expired_hv_timer()
2194 if (apic_lvtt_period(apic) && apic->lapic_timer.period) { in kvm_lapic_expired_hv_timer()
2205 restart_apic_timer(vcpu->arch.apic); in kvm_lapic_switch_to_hv_timer()
2210 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_switch_to_sw_timer()
2214 if (apic->lapic_timer.hv_timer_in_use) in kvm_lapic_switch_to_sw_timer()
2221 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_restart_hv_timer()
2223 WARN_ON(!apic->lapic_timer.hv_timer_in_use); in kvm_lapic_restart_hv_timer()
2229 atomic_set(&apic->lapic_timer.pending, 0); in __start_apic_timer()
2247 if (apic->lvt0_in_nmi_mode != lvt0_in_nmi_mode) { in apic_manage_nmi_watchdog()
2248 apic->lvt0_in_nmi_mode = lvt0_in_nmi_mode; in apic_manage_nmi_watchdog()
2250 atomic_inc(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2252 atomic_dec(&apic->vcpu->kvm->arch.vapics_in_nmi_mode); in apic_manage_nmi_watchdog()
2261 return -1; in get_lvt_index()
2263 (reg - APIC_LVTT) >> 4, KVM_APIC_MAX_NR_LVT_ENTRIES); in get_lvt_index()
2312 for (i = 0; i < apic->nr_lvt_entries; i++) { in kvm_lapic_reg_write()
2317 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reg_write()
2360 val &= (apic_lvt_mask[0] | apic->lapic_timer.timer_mode_mask); in kvm_lapic_reg_write()
2375 uint32_t old_divisor = apic->divide_count; in kvm_lapic_reg_write()
2379 if (apic->divide_count != old_divisor && in kvm_lapic_reg_write()
2380 apic->lapic_timer.period) { in kvm_lapic_reg_write()
2381 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reg_write()
2394 * Self-IPI exists only when x2APIC is enabled. Bits 7:0 hold in kvm_lapic_reg_write()
2395 * the vector, everything else is reserved. in kvm_lapic_reg_write()
2412 kvm_recalculate_apic_map(apic->vcpu->kvm); in kvm_lapic_reg_write()
2421 unsigned int offset = address - apic->base_address; in apic_mmio_write()
2425 return -EOPNOTSUPP; in apic_mmio_write()
2428 if (!kvm_check_has_quirk(vcpu->kvm, in apic_mmio_write()
2430 return -EOPNOTSUPP; in apic_mmio_write()
2436 * APIC register must be aligned on 128-bits boundary. in apic_mmio_write()
2452 kvm_lapic_reg_write(vcpu->arch.apic, APIC_EOI, 0); in kvm_lapic_set_eoi()
2464 * The BUSY bit is reserved on both Intel and AMD in x2APIC mode, but in kvm_x2apic_icr_write()
2466 * bit. And if IPI virtualization (Intel) or x2AVIC (AMD) is enabled, in kvm_x2apic_icr_write()
2467 * the CPU performs the reserved bits checks, i.e. the underlying CPU in kvm_x2apic_icr_write()
2496 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_write_nodecode()
2499 * ICR is a single 64-bit register when x2APIC is enabled, all others in kvm_apic_write_nodecode()
2500 * registers hold 32-bit values. For legacy xAPIC, ICR writes need to in kvm_apic_write_nodecode()
2507 * maybe-unecessary write, and both are in the noise anyways. in kvm_apic_write_nodecode()
2518 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_free_lapic()
2520 if (!vcpu->arch.apic) { in kvm_free_lapic()
2525 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_free_lapic()
2527 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()
2530 if (!apic->sw_enabled) in kvm_free_lapic()
2533 if (apic->regs) in kvm_free_lapic()
2534 free_page((unsigned long)apic->regs); in kvm_free_lapic()
2540 *----------------------------------------------------------------------
2542 *----------------------------------------------------------------------
2546 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_get_lapic_tscdeadline_msr()
2551 return apic->lapic_timer.tscdeadline; in kvm_get_lapic_tscdeadline_msr()
2556 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_set_lapic_tscdeadline_msr()
2561 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_set_lapic_tscdeadline_msr()
2562 apic->lapic_timer.tscdeadline = data; in kvm_set_lapic_tscdeadline_msr()
2568 apic_set_tpr(vcpu->arch.apic, (cr8 & 0x0f) << 4); in kvm_lapic_set_tpr()
2575 tpr = (u64) kvm_lapic_get_reg(vcpu->arch.apic, APIC_TASKPRI); in kvm_lapic_get_cr8()
2582 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()
2583 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_set_base()
2585 vcpu->arch.apic_base = value; in kvm_lapic_set_base()
2596 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2602 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_lapic_set_base()
2608 kvm_apic_set_x2apic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2610 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_set_base()
2618 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()
2622 apic->base_address != APIC_DEFAULT_PHYS_BASE) { in kvm_lapic_set_base()
2623 kvm_set_apicv_inhibit(apic->vcpu->kvm, in kvm_lapic_set_base()
2630 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_update_apicv()
2645 apic->irr_pending = true; in kvm_apic_update_apicv()
2647 if (apic->apicv_active) in kvm_apic_update_apicv()
2648 apic->isr_count = 1; in kvm_apic_update_apicv()
2650 apic->isr_count = count_vectors(apic->regs + APIC_ISR); in kvm_apic_update_apicv()
2652 apic->highest_isr_cache = -1; in kvm_apic_update_apicv()
2661 mutex_lock(&kvm->slots_lock); in kvm_alloc_apic_access_page()
2662 if (kvm->arch.apic_access_memslot_enabled || in kvm_alloc_apic_access_page()
2663 kvm->arch.apic_access_memslot_inhibited) in kvm_alloc_apic_access_page()
2675 ret = -EFAULT; in kvm_alloc_apic_access_page()
2680 * Do not pin the page in memory, so that memory hot-unplug in kvm_alloc_apic_access_page()
2684 kvm->arch.apic_access_memslot_enabled = true; in kvm_alloc_apic_access_page()
2686 mutex_unlock(&kvm->slots_lock); in kvm_alloc_apic_access_page()
2693 struct kvm *kvm = vcpu->kvm; in kvm_inhibit_apic_access_page()
2695 if (!kvm->arch.apic_access_memslot_enabled) in kvm_inhibit_apic_access_page()
2700 mutex_lock(&kvm->slots_lock); in kvm_inhibit_apic_access_page()
2702 if (kvm->arch.apic_access_memslot_enabled) { in kvm_inhibit_apic_access_page()
2712 kvm->arch.apic_access_memslot_enabled = false; in kvm_inhibit_apic_access_page()
2718 kvm->arch.apic_access_memslot_inhibited = true; in kvm_inhibit_apic_access_page()
2721 mutex_unlock(&kvm->slots_lock); in kvm_inhibit_apic_access_page()
2728 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_reset()
2745 hrtimer_cancel(&apic->lapic_timer.timer); in kvm_lapic_reset()
2749 kvm_apic_set_xapic_id(apic, vcpu->vcpu_id); in kvm_lapic_reset()
2750 kvm_apic_set_version(apic->vcpu); in kvm_lapic_reset()
2752 for (i = 0; i < apic->nr_lvt_entries; i++) in kvm_lapic_reset()
2756 kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_LINT0_REENABLED)) in kvm_lapic_reset()
2782 atomic_set(&apic->lapic_timer.pending, 0); in kvm_lapic_reset()
2784 vcpu->arch.pv_eoi.msr_val = 0; in kvm_lapic_reset()
2786 if (apic->apicv_active) { in kvm_lapic_reset()
2788 kvm_x86_call(hwapic_irr_update)(vcpu, -1); in kvm_lapic_reset()
2789 kvm_x86_call(hwapic_isr_update)(-1); in kvm_lapic_reset()
2792 vcpu->arch.apic_arb_prio = 0; in kvm_lapic_reset()
2793 vcpu->arch.apic_attention = 0; in kvm_lapic_reset()
2795 kvm_recalculate_apic_map(vcpu->kvm); in kvm_lapic_reset()
2799 *----------------------------------------------------------------------
2801 *----------------------------------------------------------------------
2811 struct kvm_lapic *apic = vcpu->arch.apic; in apic_has_pending_timer()
2814 return atomic_read(&apic->lapic_timer.pending); in apic_has_pending_timer()
2832 guest_cpuid_is_intel_compatible(apic->vcpu)) in kvm_apic_local_deliver()
2841 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_nmi_wd_deliver()
2861 hrtimer_add_expires_ns(&ktimer->timer, ktimer->period); in apic_timer_fn()
2873 if (!irqchip_in_kernel(vcpu->kvm)) { in kvm_create_lapic()
2882 vcpu->arch.apic = apic; in kvm_create_lapic()
2885 apic->regs = kvm_x86_call(alloc_apic_backing_page)(vcpu); in kvm_create_lapic()
2887 apic->regs = (void *)get_zeroed_page(GFP_KERNEL_ACCOUNT); in kvm_create_lapic()
2888 if (!apic->regs) { in kvm_create_lapic()
2890 vcpu->vcpu_id); in kvm_create_lapic()
2893 apic->vcpu = vcpu; in kvm_create_lapic()
2895 apic->nr_lvt_entries = kvm_apic_calc_nr_lvt_entries(vcpu); in kvm_create_lapic()
2897 hrtimer_init(&apic->lapic_timer.timer, CLOCK_MONOTONIC, in kvm_create_lapic()
2899 apic->lapic_timer.timer.function = apic_timer_fn; in kvm_create_lapic()
2901 apic->lapic_timer.timer_advance_ns = LAPIC_TIMER_ADVANCE_NS_INIT; in kvm_create_lapic()
2907 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()
2909 kvm_iodevice_init(&apic->dev, &apic_mmio_ops); in kvm_create_lapic()
2917 * unlikely to have inhibits. Ignore the current per-VM APICv state so in kvm_create_lapic()
2919 * the request will ensure the vCPU gets the correct state before VM-Entry. in kvm_create_lapic()
2922 apic->apicv_active = true; in kvm_create_lapic()
2929 vcpu->arch.apic = NULL; in kvm_create_lapic()
2931 return -ENOMEM; in kvm_create_lapic()
2936 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_has_interrupt()
2940 return -1; in kvm_apic_has_interrupt()
2949 u32 lvt0 = kvm_lapic_get_reg(vcpu->arch.apic, APIC_LVT0); in kvm_apic_accept_pic_intr()
2951 if (!kvm_apic_hw_enabled(vcpu->arch.apic)) in kvm_apic_accept_pic_intr()
2961 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_inject_apic_timer_irqs()
2963 if (atomic_read(&apic->lapic_timer.pending) > 0) { in kvm_inject_apic_timer_irqs()
2965 atomic_set(&apic->lapic_timer.pending, 0); in kvm_inject_apic_timer_irqs()
2971 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_ack_interrupt()
2987 * For auto-EOI interrupts, there might be another pending in kvm_apic_ack_interrupt()
2995 * be a higher-priority pending interrupt---except if there was in kvm_apic_ack_interrupt()
3009 if (apic_x2apic_mode(vcpu->arch.apic)) { in kvm_apic_state_fixup()
3010 u32 x2apic_id = kvm_x2apic_id(vcpu->arch.apic); in kvm_apic_state_fixup()
3011 u32 *id = (u32 *)(s->regs + APIC_ID); in kvm_apic_state_fixup()
3012 u32 *ldr = (u32 *)(s->regs + APIC_LDR); in kvm_apic_state_fixup()
3015 if (vcpu->kvm->arch.x2apic_format) { in kvm_apic_state_fixup()
3017 return -EINVAL; in kvm_apic_state_fixup()
3036 * if the ICR is _not_ split, ICR is internally a single 64-bit in kvm_apic_state_fixup()
3045 icr = __kvm_lapic_get_reg(s->regs, APIC_ICR) | in kvm_apic_state_fixup()
3046 (u64)__kvm_lapic_get_reg(s->regs, APIC_ICR2) << 32; in kvm_apic_state_fixup()
3047 __kvm_lapic_set_reg64(s->regs, APIC_ICR, icr); in kvm_apic_state_fixup()
3049 icr = __kvm_lapic_get_reg64(s->regs, APIC_ICR); in kvm_apic_state_fixup()
3050 __kvm_lapic_set_reg(s->regs, APIC_ICR2, icr >> 32); in kvm_apic_state_fixup()
3060 memcpy(s->regs, vcpu->arch.apic->regs, sizeof(*s)); in kvm_apic_get_state()
3066 __kvm_lapic_set_reg(s->regs, APIC_TMCCT, in kvm_apic_get_state()
3067 __apic_read(vcpu->arch.apic, APIC_TMCCT)); in kvm_apic_get_state()
3074 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_set_state()
3079 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_set_state()
3081 apic_set_spiv(apic, *((u32 *)(s->regs + APIC_SPIV))); in kvm_apic_set_state()
3085 kvm_recalculate_apic_map(vcpu->kvm); in kvm_apic_set_state()
3088 memcpy(vcpu->arch.apic->regs, s->regs, sizeof(*s)); in kvm_apic_set_state()
3090 atomic_set_release(&apic->vcpu->kvm->arch.apic_map_dirty, DIRTY); in kvm_apic_set_state()
3091 kvm_recalculate_apic_map(vcpu->kvm); in kvm_apic_set_state()
3096 apic->lapic_timer.expired_tscdeadline = 0; in kvm_apic_set_state()
3103 if (apic->apicv_active) { in kvm_apic_set_state()
3110 if (ioapic_in_kernel(vcpu->kvm)) in kvm_apic_set_state()
3113 vcpu->arch.apic_arb_prio = 0; in kvm_apic_set_state()
3126 timer = &vcpu->arch.apic->lapic_timer.timer; in __kvm_migrate_apic_timer()
3132 * apic_sync_pv_eoi_from_guest - called on vmexit or cancel interrupt
3147 * -> host disabled PV EOI. in apic_sync_pv_eoi_from_guest()
3149 * -> host enabled PV EOI, guest did not execute EOI yet. in apic_sync_pv_eoi_from_guest()
3151 * -> host enabled PV EOI, guest executed EOI. in apic_sync_pv_eoi_from_guest()
3165 if (test_bit(KVM_APIC_PV_EOI_PENDING, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
3166 apic_sync_pv_eoi_from_guest(vcpu, vcpu->arch.apic); in kvm_lapic_sync_from_vapic()
3168 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_from_vapic()
3171 if (kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_from_vapic()
3175 apic_set_tpr(vcpu->arch.apic, data & 0xff); in kvm_lapic_sync_from_vapic()
3179 * apic_sync_pv_eoi_to_guest - called before vmentry
3189 apic->irr_pending || in apic_sync_pv_eoi_to_guest()
3191 apic->highest_isr_cache == -1 || in apic_sync_pv_eoi_to_guest()
3193 kvm_ioapic_handles_vector(apic, apic->highest_isr_cache)) { in apic_sync_pv_eoi_to_guest()
3201 pv_eoi_set_pending(apic->vcpu); in apic_sync_pv_eoi_to_guest()
3208 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_lapic_sync_to_vapic()
3212 if (!test_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention)) in kvm_lapic_sync_to_vapic()
3224 kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apic->vapic_cache, &data, in kvm_lapic_sync_to_vapic()
3231 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, in kvm_lapic_set_vapic_addr()
3232 &vcpu->arch.apic->vapic_cache, in kvm_lapic_set_vapic_addr()
3234 return -EINVAL; in kvm_lapic_set_vapic_addr()
3235 __set_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
3237 __clear_bit(KVM_APIC_CHECK_VAPIC, &vcpu->arch.apic_attention); in kvm_lapic_set_vapic_addr()
3240 vcpu->arch.apic->vapic_addr = vapic_addr; in kvm_lapic_set_vapic_addr()
3264 * ICR is a 64-bit register in x2APIC mode (and Hyper-V PV vAPIC) and in kvm_lapic_msr_write()
3266 * through 32-bit reads/writes. in kvm_lapic_msr_write()
3271 /* Bits 63:32 are reserved in all other registers. */ in kvm_lapic_msr_write()
3280 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_write()
3281 u32 reg = (msr - APIC_BASE_MSR) << 4; in kvm_x2apic_msr_write()
3291 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_x2apic_msr_read()
3292 u32 reg = (msr - APIC_BASE_MSR) << 4; in kvm_x2apic_msr_read()
3305 return kvm_lapic_msr_write(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_write()
3313 return kvm_lapic_msr_read(vcpu->arch.apic, reg, data); in kvm_hv_vapic_msr_read()
3319 struct gfn_to_hva_cache *ghc = &vcpu->arch.pv_eoi.data; in kvm_lapic_set_pv_eoi()
3327 if (addr == ghc->gpa && len <= ghc->len) in kvm_lapic_set_pv_eoi()
3328 new_len = ghc->len; in kvm_lapic_set_pv_eoi()
3332 ret = kvm_gfn_to_hva_cache_init(vcpu->kvm, ghc, addr, new_len); in kvm_lapic_set_pv_eoi()
3337 vcpu->arch.pv_eoi.msr_val = data; in kvm_lapic_set_pv_eoi()
3344 struct kvm_lapic *apic = vcpu->arch.apic; in kvm_apic_accept_events()
3354 return r == -EBUSY ? 0 : r; in kvm_apic_accept_events()
3356 * Continue processing INIT/SIPI even if a nested VM-Exit in kvm_apic_accept_events()
3365 * wait-for-SIPI (WFS). in kvm_apic_accept_events()
3368 WARN_ON_ONCE(vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED); in kvm_apic_accept_events()
3369 clear_bit(KVM_APIC_SIPI, &apic->pending_events); in kvm_apic_accept_events()
3373 if (test_and_clear_bit(KVM_APIC_INIT, &apic->pending_events)) { in kvm_apic_accept_events()
3375 if (kvm_vcpu_is_bsp(apic->vcpu)) in kvm_apic_accept_events()
3376 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()
3378 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED; in kvm_apic_accept_events()
3380 if (test_and_clear_bit(KVM_APIC_SIPI, &apic->pending_events)) { in kvm_apic_accept_events()
3381 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) { in kvm_apic_accept_events()
3384 sipi_vector = apic->sipi_vector; in kvm_apic_accept_events()
3387 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE; in kvm_apic_accept_events()